參數(shù)資料
型號: PI6C182BHE
廠商: Pericom Semiconductor Corp.
英文描述: Precision 1-10 Clock Buffer
中文描述: 精密1-10時鐘緩沖器
文件頁數(shù): 5/7頁
文件大?。?/td> 303K
代理商: PI6C182BHE
PI6C182B
Precision 1-10 Clock Buffer
5
PS8465C 09/07/05
Figure 1. Clock Waveforms
Notes:
1.
Maximum rise/fall times are guaranteed at maximum specified
load.
Minimum rise/fall times are guaranteed at minimum specified
load.
Rise/fall times are specified with pure capacitive load as shown.
Testing is done with an additional 500Ω resistor in parallel.
2.
3.
Minimum and Maximum Expected
Capacitive Loads
Clock
Min.
Max.
Units
Notes
SDRAM
15
20
pF
SDRAM DIMM
Specificaion
Design Guidelines to Reduce EMI
1. Place series resistors and CI capacitors as close as possible to
the respective clock pins. Typical value for CI is 10pF. Series
resistor value can be increased to reduce EMI provided that
the rise and fall time are still within the specified values.
2. Minimize the number of “vias” of the clock traces.
3. Route clock traces over a continuous ground plane or over
a continuous power plane. Avoid routing clock traces from
plane to plane (refer to rule #2).
4. Position clock signals away from signals that go to any cables
or any external connectors.
1.5V
1.5V
tphl
tplh
1.5V
1.5V
Input
Waveform
Output
Waveform
Output
Buffer
Test
Point
2.4
1.5
0.4
tSDKH
tSDKP
3.3V
Clocking
Interface
(TTL)
tSDKL
tSDFALL
tSDRISE
Test Load
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