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參數資料
| 型號： | PI6C2408-1WE |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | Zero-Delay Clock Buffer |
| 中文描述： | 零延遲時鐘緩沖器 |
| 文件頁數： | 1/10頁 |
| 文件大?。?/td> | 199K |
| 代理商： | PI6C2408-1WE |
1
PS8589E 09/15/04
Features
Maximum rated frequency: 140 MHz
Low cycle-to-cycle jitter
Input to output delay, less than 150ps
External feedback pin allows outputs to be synchronized
to the clock input
5V tolerant input*
Operates at 3.3V V
DD
Test mode allows bypass of the PLL for system testing
purposes (e.g., IBIS measurements)
Clock frequency multipliers x to 4x dependent on option
Packaging (Pb-free and Green available):
-16-pin, 150-mil SOIC (W)
-16-pin 173-mil TSSOP (L)
Description
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability
to distribute eight outputs of up to 140 MHz at 3.3 V. Two banks of
four outputs exist, and, depending on product option ordered, can
supply either reference frequency, prescaled half frequency, or
multiplied 2x or 4x input clock frequencies. The PI6C2408 family has
a power-sparing feature: when input SEL2 is 0, the component will
3-state one or both banks of outputs depending on the state of input
SEL1. A PLL bypass test mode also exists. This product line is
available in high-drive and industrial environment versions.
An external feedback pin is used to synchronize the outputs to the
input; the relationship between loading of this signal and the other
outputs determines the input-output delay.
The PI6C2408 is characterized for both commercial and industrial
operation.
Block Diagram
Pin Configuration
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
* FB_IN and CLKIN must reference the same voltage thresh-
olds for the PLL to deliver zero delay skewing
PLL
Option (-3, -4)
CLKIN
FB_IN
SEL1
SEL2
Decode
Logic
Decode
Logic
OUTA1
OUTA2
OUTA3
OUTA4
OUTB2
OUTB3
OUTB4
OUTB1
PI6C2408 (-1, -1H, -2, -3, -4)
÷2
PLL
CLKIN
FB_IN
SEL2
SEL1
OUTA1
OUTA2
OUTA3
OUTA4
OUTB2
OUTB3
OUTB4
OUTB1
PI6C2408-6
MUX
÷2
÷2
Option (-2, -3)
MUX
MUX
1
2
3
4
5
6
7
8
VDD
GND
OUTA2
OUTB2
SEL2
SEL1
OUTB1
FB_IN
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
16
15
14
13
12
11
10
9
CLKIN
OUTA1
16-Pin
W, L
相關PDF資料 |
PDF描述 |
|---|---|
| PI6C2408-2W | Zero-Delay Clock Buffer |
| PI6C2408-2WE | Zero-Delay Clock Buffer |
| PI6C2408-3L | Zero-Delay Clock Buffer |
| PI6C2408-3LE | Zero-Delay Clock Buffer |
| PI6C2408-3W | Zero-Delay Clock Buffer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PI6C2408-1WEX | 功能描述:鎖相環(huán) - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2408-1WI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SOP|16PIN|PLASTIC |
| PI6C2408-1WIE | 功能描述:鎖相環(huán) - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2408-1WIEX | 功能描述:鎖相環(huán) - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2408-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock IC | 4+4 Output Zero-Delay Clock Driver(Bank A = Ref. Bank B=Ref/2). 10 to 134 MHz |
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