參數(shù)資料
型號: PI6C410MAE
廠商: Pericom
文件頁數(shù): 20/21頁
文件大?。?/td> 0K
描述: IC CLK GEN INTEL PCI-EX 56-TSSOP
產(chǎn)品變化通告: Product Discontinuation Notice 11/Feb/2008
標(biāo)準(zhǔn)包裝: 35
系列: PCI Express® (PCIe)
類型: 時鐘/頻率發(fā)生器,多路復(fù)用器
PLL:
主要目的: Intel CPU,PCI Express(PCIe)
輸入: 晶體
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:19
差分 - 輸入:輸出: 無/是
頻率 - 最大: 400MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 管件
8
PS8736F
11/12/08
PI6C410M/410MA
Clock Generator for Intel
PCI Express Mobile Chipset
Data Byte 6: Control Register
Bit
Descriptions
Type
Power Up
Condition
Output(s) Affected
Pin
Source
Pin
0
FS_A Reects the value of the
FS_A pin sampled on power up
0 = FS_A was low during
Vtt_Pwrgd# assertion
R
Externally Se-
lected
CPU[0:2]
35, 36, 40, 41, 43,
44
NA
1
FS_B Reects the value of the
FS_B pin sampled on power up
0 = FS_B was low during
Vtt_Pwrgd# assertion
R
Externally Se-
lected
CPU[0:2]
35, 36, 40, 41, 43,
44
NA
2
FS_C Reects the value of the
FS_C pin sampled on power up
0 = FS_C was low during
Vtt_Pwrgd# assertion
R
Externally Se-
lected
CPU[0:2]
35, 36, 40, 41, 43,
44
NA
3
PCI_Stop control
1 = Disabled,
0 = Enabled, Stopped SRC and
PCI clocks
RW
1 = Disabled
All PCI & SRC
clocks except PCIF
and SRC clocks set to
free-running
3, 4, 5, 17, 18, 19,
20, 22, 23, 24, 25,
26, 27, 30, 31, 32,
33, 35, 36, 56
NA
4
REF Output Drive Strength
0 = 1x, 1 = 2x
RW
1 = 2X
REF
52
NA
5
Reserved
RW
6
Test Clock Mode Entry Control
0 = Disabled, 1 = REF/N or Hi-Z
RW
0 = Disabled
7
Test Clock Mode
0 = Hi-Z, 1 = REF/N
RW
0 = Hi-Z
CPU[0:2],
SRC[0:7],
PCI[2:5],
PCIF[0:1], REF,
USB_48, DOT_96
3, 4, 5, 8, 9, 12,
14, 15, 17, 18, 19,
20, 22, 23, 24, 25,
26, 27, 30, 31, 32,
33, 35, 36, 40, 41,
43, 44, 52, 56
NA
DataByte 7: Control Register
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
Pin
0
Vendor ID
R
0
NA
1R
0
NA
2R
0
NA
3R
0
NA
4
Revision Code
R
1
NA
5R
0
NA
6R
1
NA
7R
0
NA
08-0298
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