參數(shù)資料
型號: PI74AVC16835KE
廠商: Pericom
文件頁數(shù): 1/10頁
文件大?。?/td> 0K
描述: IC UNIV BUS DVR 18BIT 56TVSOP
標準包裝: 43
系列: 74AVC
邏輯類型: 通用總線驅動器
電路數(shù): 18 位
輸出電流高,低: 12mA,12mA
電源電壓: 1.65 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.173",4.40mm 寬)
供應商設備封裝: 56-TVSOP
包裝: 管件
1
PS8373G
10/27/09
Product Description
Data flow from A to Y is controlled by Output Enable (OE). The device
operates in the transparent mode when LE is HIGH. The A data is
latched if CLK is held at a high or low logic level. If LE is LOW, the
A-bus is stored in the latch/flip-flop on the low-to-high transition of
CLK. When OE is HIGH, the outputs are in the high-impedance state.
The PI74AVC16835 bus driver is designed to drive an array of 133
MHz synchronous memory chips, with minimal undershoot/
overshoot noise, and to meet the input signal rise/fall time requirement
of memory chips.
The output drivers of this part have an embedded series-resistor. For
DIMM module design, no external series termination resistors near
the buffer drivers or any other termination resistors are required. This
feature simplifies DIMM module layout design, and results in cost
savings.
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Product Features
Very high-speed, low-noise universal bus driver with
embedded resistor outputs
Meets PC133 SDRAM Registered DIMM specification
Implements output impedance control for low-noise and
heavy-load applications
Fast Propagation Delay:
2.5ns max. for 50pF test load
VCC = 3.3V or 2.5V or 1.8V
Packaging (Pb-free and Green available):
– 56-pin, 240 mil wide plastic TSSOP (A)
PI74AVC16835
18-Bit Universal Bus Driver
with 3-State Outputs
ProductPinConfiguration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
25
26
27
28
32
31
30
29
NC
LE
OE
Y18
GND
Y17
NC
Y1
GND
Y2
Y3
VDD
Y4
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
GND
Y12
Y13
Y14
Y15
VDD
Y16
GND
LE
CLK
A18
GND
A17
NC
A1
GND
A2
A3
VDD
A4
A5
A6
GND
A7
A8
A9
A10
A11
GND
A12
A13
A14
A15
VDD
A16
09-0003
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相關代理商/技術參數(shù)
參數(shù)描述
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