PI74FCT16646T/162646T/162H646T
16-Bit Registered Transceivers
2
PS2039B 02/24/99
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
DIR
1
CLKAB
1
SAB
GND
1
A
0
1
A
1
VCC
1
A
2
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
2
A
0
2
A
1
2
A
2
GND
2
A
3
2
A
4
2
A
5
V
CC
2
A
6
2
A
7
GND
2
SAB
2
CLKAB
2
DIR
1
OE
1
CLKBA
1
SBA
GND
1
B
0
1
B
1
VCC
1
B
2
1
B
3
1
B
4
GND
1
B
5
1
B
6
1
B
7
2
B
0
2
B
1
2
B
2
GND
2
B
3
2
B
4
2
B
5
V
CC
2
B
6
2
B
7
GND
2
SBA
2
CLKBA
2
OE
Product Pin Configuration
Notes
:
1.The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs.
Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
2. Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.
H = High Voltage Level; L = Low Voltage Level; X = Don’t Care;
↑
= LOW-to-HIGH transition
Pin Name
xAx
(1)
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
Ground
Power
xBx
(1)
xCLKAB, xCLKBA
SAB, SBA
xDIR, xOE
GND
V
CC
Note
: 1.For the PI74FCT162H646T, these pins have
“Bus Hold.” All other pins are standard, outputs, or I/Os.
Product Pin Description
Inputs
DATA I/O
(2)
X
A
X
Input
Function/Operation
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
xOE
H
H
L
L
L
L
X
DIR
X
X
L
L
H
H
X
CLKAB
H or L
↑
X
X
X
H or L
X
CLKBA
H or L
↑
X
H or L
X
X
X
SAB
X
X
X
X
L
H
X
SBA
X
X
L
H
X
X
X
B
X
Input
Output
Input
Input
Output
Truth Table
56-PIN
V56
A56
K56