label ] ADDWF f,d" />
參數(shù)資料
型號: PIC12C508-04I/SM
廠商: Microchip Technology
文件頁數(shù): 58/113頁
文件大小: 0K
描述: IC MCU OTP 512X12 8-SOIJ
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 90
系列: PIC® 12C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 768B(512 x 12)
程序存儲器類型: OTP
RAM 容量: 25 x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.209",5.30mm 寬)
包裝: 管件
配用: XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208
AC164312-ND - MODULE SKT FOR PM3 16SOIC
309-1048-ND - ADAPTER 8-SOIC TO 8-DIP
309-1047-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
1999 Microchip Technology Inc.
DS40139E-page 49
PIC12C5XX
ADDWF
Add W and f
Syntax:
[
label ] ADDWF
f,d
Operands:
0
≤ f ≤ 31
d
∈ [0,1]
Operation:
(W) + (f)
→ (dest)
Status Affected:
C, DC, Z
Encoding:
0001
11df
ffff
Description:
Add the contents of the W register and
register ’f’. If ’d’ is 0 the result is stored
in the W register. If ’d’ is ’1’ the result is
stored back in register ’f’
.
Words:
1
Cycles:
1
Example:
ADDWF
FSR, 0
Before Instruction
W
=
0x17
FSR =
0xC2
After Instruction
W
=
0xD9
FSR =
0xC2
ANDLW
And literal with W
Syntax:
[
label ] ANDLW
k
Operands:
0
≤ k ≤ 255
Operation:
(W).AND. (k)
→ (W)
Status Affected:
Z
Encoding:
1110
kkkk
Description:
The contents of the W register are
AND’ed with the eight-bit literal 'k'. The
result is placed in the W register
.
Words:
1
Cycles:
1
Example:
ANDLW
0x5F
Before Instruction
W=
0xA3
After Instruction
W
=
0x03
ANDWF
AND W with f
Syntax:
[
label ] ANDWF
f,d
Operands:
0
≤ f ≤ 31
d
∈ [0,1]
Operation:
(W) .AND. (f)
→ (dest)
Status Affected:
Z
Encoding:
0001
01df
ffff
Description:
The contents of the W register are
AND’ed with register 'f'. If 'd' is 0 the
result is stored in the W register. If 'd' is
'1' the result is stored back in register 'f'
.
Words:
1
Cycles:
1
Example:
ANDWF
FSR,
1
Before Instruction
W
=
0x17
FSR =
0xC2
After Instruction
W
=
0x17
FSR =
0x02
BCF
Bit Clear f
Syntax:
[
label ] BCF
f,b
Operands:
0
≤ f ≤ 31
0
≤ b ≤ 7
Operation:
0
→ (f<b>)
Status Affected:
None
Encoding:
0100
bbbf
ffff
Description:
Bit 'b' in register 'f' is cleared.
Words:
1
Cycles:
1
Example:
BCF
FLAG_REG,
7
Before Instruction
FLAG_REG = 0xC7
After Instruction
FLAG_REG = 0x47
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