參數(shù)資料
型號(hào): PIC12C509A/JW
廠商: Microchip Technology
文件頁(yè)數(shù): 78/113頁(yè)
文件大?。?/td> 0K
描述: IC MCU EPROM 1KX12 8CDIP
標(biāo)準(zhǔn)包裝: 56
系列: PIC® 12C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 1.5KB(1K x 12)
程序存儲(chǔ)器類(lèi)型: EPROM,UV
RAM 容量: 41 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-CDIP(0.300",7.62mm)窗口
包裝: 管件
配用: DVMCPA-ND - KIT DVR BOARD EVAL SYSTEM MXDEV1
DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE
其它名稱(chēng): PIC12C509A/JWR
PIC12C509A/JWR-ND
1999 Microchip Technology Inc.
DS40139E-page 67
PIC12C5XX
11.2
DC CHARACTERISTICS:
PIC12C508/509 (Commercial, Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature
0°C
≤ TA ≤ +70°C (commercial)
–40°C
≤ TA ≤ +85°C (industrial)
–40°C
≤ TA ≤ +125°C (extended)
Operating voltage VDD range as described in DC spec Section 11.1 and
Param
No.
Characteristic
Sym
Min
Typ
Max
Units
Conditions
Input Low Voltage
I/O ports
VIL
-
D030
with TTL buffer
VSS
-0.8V
V
4.5
< VDD ≤ 5.5V
-0.15VDD
Votherwise
D031
with Schmitt Trigger buffer
VSS
-0.15VDD
V
D032
MCLR, GP2/T0CKI (in EXTRC mode)
VSS
-0.15VDD
V
D033
OSC1 (EXTRC) (1)
VSS
-0.15VDD
D033
OSC1 (in XT and LP)
VSS
-0.3VDD
VNote1
Input High Voltage
I/O ports
VIH
-
D040
with TTL buffer
VSS
2.0V
-
VDD
V4.5
≤ VDD ≤ 5.5V
D040A
0.25VDD +
0.8V
-VDD
Votherwise
D041
with Schmitt Trigger buffer
0.85VDD
-VDD
V
For entire VDD range
D042
MCLR/GP2/T0CKI
0.85VDD
-VDD
V
D042A OSC1 (XT and LP)
0.7VDD
-VDD
VNote1
D043
OSC1 (in EXTRC mode)
0.85VDD
-VDD
V
D070
GPIO weak pull-up current
IPUR
50
250
400
AVDD = 5V, VPIN = VSS
Input Leakage Current (2, 3)
For VDD
≤5.5V
D060
I/O ports
IIL
-1
0.5
+1
A Vss ≤ VPIN ≤ VDD,
Pin at hi-impedance
D061
MCLR, GP2/T0CKI
20
130
0.5
250
+5
A
VPIN = VSS + 0.25V(2)
VPIN = VDD
D063
OSC1
-3
0.5
+3
A Vss ≤ VPIN ≤ VDD,
XT and LP options
Output Low Voltage
D080
I/O ports/CLKOUT
VOL
--
0.6
V
IOL = 8.7 mA, VDD = 4.5V
Output High Voltage
D090
I/O ports/CLKOUT (3)
VOH
VDD - 0.7
--V
IOH = -5.4 mA, VDD = 4.5V
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
COSC2
-
15
pF
In XT and LP modes when
external clock is used to drive
OSC1.
D101
All I/O pins
CIO
-
50
pF
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that
the PIC12C5XX be driven with external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels
represent normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
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