參數(shù)資料
型號： PIC12CE674-10E/P
廠商： Microchip Technology
文件頁數(shù)： 39/129頁
文件大?。?/td> 0K
描述： IC MCU OTP 2KX14 A/D&EE 8DIP
產(chǎn)品培訓模塊： Asynchronous Stimulus
標準包裝： 60
系列： PIC® 12C
核心處理器： PIC
芯體尺寸： 8-位
速度： 10MHz
外圍設備： POR，WDT
輸入/輸出數(shù)： 5
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： OTP
EEPROM 大?。?/td> 16 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-DIP（0.300"，7.62mm）
包裝： 管件
1999 Microchip Technology Inc.
DS30561B-page 17
PIC12C67X
4.2.2.3
INTCON REGISTER
The INTCON Register is a readable and writable regis-
ter, which contains various enable and flag bits for the
TMR0 Register overflow, GPIO port change and exter-
nal GP2/INT pin interrupts.
Note:
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
REGISTER 4-3:
INTCON REGISTER (ADDRESS 0Bh, 8Bh)
R/W-0
R/W-x
GIE
PEIE
T0IE
INTE
GPIE
T0IF
INTF
GPIF
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
GIE: Global Interrupt Enable bit
1
= Enables all un-masked interrupts
0
= Disables all interrupts
bit 6:
PEIE: Peripheral Interrupt Enable bit
1
= Enables all un-masked peripheral interrupts
0
= Disables all peripheral interrupts
bit 5:
T0IE: TMR0 Overflow Interrupt Enable bit
1
= Enables the TMR0 interrupt
0
= Disables the TMR0 interrupt
bit 4:
INTE: INT External Interrupt Enable bit
1
= Enables the external interrupt on GP2/INT/T0CKI/AN2 pin
0
= Disables the external interrupt on GP2/INT/T0CKI/AN2 pin
bit 3:
GPIE: GPIO Interrupt on Change Enable bit
1
= Enables the GPIO Interrupt on Change
0
= Disables the GPIO Interrupt on Change
bit 2:
T0IF: TMR0 Overflow Interrupt Flag bit
1
= TMR0 register has overflowed (must be cleared in software)
0
= TMR0 register did not overflow
bit 1:
INTF: INT External Interrupt Flag bit
1
= The external interrupt on GP2/INT/T0CKI/AN2 pin occurred (must be cleared in software)
0
= The external interrupt on GP2/INT/T0CKI/AN2 pin did not occur
bit 0:
GPIF: GPIO Interrupt on Change Flag bit
1
= GP0, GP1 or GP3 pins changed state (must be cleared in software)
0
= Neither GP0, GP1 nor GP3 pins have changed state
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相關代理商/技術參數(shù)
參數(shù)描述
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