參數(shù)資料
型號： PIC12F1822T-I/SN
廠商： Microchip Technology
文件頁數(shù)： 43/109頁
文件大?。?/td> 0K
描述： MCU 8BIT 2K FLASH 8SOIC
標(biāo)準(zhǔn)包裝： 3,300
系列： PIC® XLP™ 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 32MHz
連通性： I²C，LIN，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 6
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
包裝： 帶卷 (TR)
2010-2012 Microchip Technology Inc.
DS41413C-page 23
PIC12(L)F1822/PIC16(L)F1823
3.1.1.2
Indirect Read with FSR
The program memory can be accessed as data by set-
ting bit 7 of the FSRxH register and reading the match-
ing INDFx register. The MOVIW instruction will place the
lower eight bits of the addressed word in the W register.
Writes to the program memory cannot be performed via
the INDF registers. Instructions that access the pro-
gram memory via the FSR require one extra instruction
cycle to complete. Example 3-2 demonstrates access-
ing the program memory via an FSR.
The HIGH directive will set bit<7> if a label points to a
location in program memory.
EXAMPLE 3-2:
ACCESSING PROGRAM
MEMORY VIA FSR
3.2
Data Memory Organization
The data memory is partitioned in 32 memory banks
with 128 bytes in a bank. Each bank consists of
12 core registers
20 Special Function Registers (SFR)
Up to 80 bytes of General Purpose RAM (GPR)
16 bytes of common RAM
The active bank is selected by writing the bank number
into the Bank Select Register (BSR). Unimplemented
memory will read as ‘0’. All data memory can be
accessed either directly (via instructions that use the
file registers) or indirectly via the two File Select
Registers
(FSR).
See
for more information.
3.2.1
CORE REGISTERS
The core registers contain the registers that directly
affect
the
basic
operation
of
the
PIC12(L)F1822/16(L)F1823. These registers are listed
below:
INDF0
INDF1
PCL
STATUS
FSR0 Low
FSR0 High
FSR1 Low
FSR1 High
BSR
WREG
PCLATH
INTCON
constants
RETLW DATA0
;Index0 data
RETLW DATA1
;Index1 data
RETLW DATA2
RETLW DATA3
my_function
;… LOTS OF CODE…
MOVLW
LOW constants
MOVWF
FSR1L
MOVLW
HIGH constants
MOVWF
FSR1H
MOVIW 0[FSR1]
;THE PROGRAM MEMORY IS IN W
Note:
The core registers are the first 12
addresses of every data memory bank.
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