參數(shù)資料
型號(hào): PIC12F508-I/MC
廠商: Microchip Technology
文件頁(yè)數(shù): 28/44頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 512X12 8DFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 150
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 5
程序存儲(chǔ)器容量: 768B(512 x 12)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 25 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VFDFN 裸露焊盤(pán)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 637 (CN2011-ZH PDF)
配用: AC164334-ND - MODULE SOCKET FOR 8L 2X3MM DFN
AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE
34
6062LS–ATARM–23-Mar-09
AT91SAM9261
10.3.5
System Interrupt
The System Interrupt in Source 1 is the wired-OR of the interrupt signals coming from:
the SDRAM Controller
the Debug Unit
the Periodic Interval Timer
the Real-Time Timer
the Watchdog Timer
the Reset Controller
the Power Management Controller
The clock of these peripherals cannot be deactivated and Peripheral ID 1 can only be used
within the Advanced Interrupt Controller.
10.3.6
External Interrupts
All external interrupt signals, i.e., the Fast Interrupt signal FIQ or the Interrupt signals IRQ0 to
IRQ2, use a dedicated Peripheral ID. However, there is no clock control associated with these
peripheral IDs.
10.4
External Bus Interface
Integrates two External Memory Controllers:
– Static Memory Controller
– SDRAM Controller
Additional logic for NAND Flash and CompactFlash support
– NAND Flash support: 8-bit as well as 16-bit devices are supported
– CompactFlash support: all modes (Attribute Memory, Common Memory, I/O, True
IDE) are supported but the signals -IOIS16 (I/O and True IDE modes) and -ATA SEL
(True IDE mode) are not handled.
Optimized External Bus
– 16- or 32-bit Data Bus
– Up to 26-bit Address Bus, up to 64 Mbytes addressable
– Eight Chip Selects, each reserved to one of the eight Memory Areas
– Optimized pin multiplexing to reduce latencies on External Memories
Configurable Chip Select Assignment Managed by EBI_CSA Register located in the MATRIX
user interface
– Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash Support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash Support
– Static Memory Controller on NCS6 - NCS7
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