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| 型號： | PIC12F509-I/P |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 21/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 1KX12 8DIP |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 標準包裝： | 60 |
| 系列： | PIC® 12F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 4MHz |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 5 |
| 程序存儲器容量： | 1.5KB（1K x 12） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 41 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 637 (CN2011-ZH PDF) |
| 配用： | AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN DM163029-ND - BOARD PICDEM FOR MECHATRONICS DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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PIC12F508/509/16F505
DS41236E-page 28
2009 Microchip Technology Inc.
4.9
Indirect Data Addressing: INDF
and FSR Registers
The INDF register
is
not
a physical
register.
Addressing INDF actually addresses the register
whose address is contained in the FSR register (FSR
is a pointer). This is indirect addressing.
4.9.1
INDIRECT ADDRESSING
Register file 07 contains the value 10h
Register file 08 contains the value 0Ah
Load the value 07 into the FSR register
A read of the INDF register will return the value
of 10h
Increment the value of the FSR register by one
(FSR = 08)
A read of the INDR register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no operation (although Status bits may be affected).
A simple program to clear RAM locations 10h-1Fh
using indirect addressing is shown in Example 4-1.
EXAMPLE 4-1:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
The FSR is a 5-bit wide register. It is used in conjunction
with the INDF register to indirectly address the data
memory area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
FIGURE 4-7:
DIRECT/INDIRECT ADDRESSING (PIC12F508/509)
PIC12F508 – Does not use banking. FSR <7:5> are
unimplemented and read as ‘1’s.
PIC12F509 – Uses FSR<5>. Selects between bank 0
and bank 1. FSR<7:6> are unimplemented, read as
‘1’.
PIC16F505 – Uses FSR<6:5>. Selects from bank 0 to
bank 3. FSR<7> is unimplemented, read as ‘1’.
MOVLW
0x10
;initialize pointer
MOVWF
FSR
;to RAM
NEXT
CLRF
INDF
;clear INDF
;register
INCF
FSR,F
;inc pointer
BTFSC
FSR,4
;all done?
GOTO
NEXT
;NO, clear next
CONTINUE
:
;YES, continue
:
Note 1:
For register map detail, see Section 4.3 “Data Memory Organization”.
2:
PIC12F509.
Bank
Location Select
Bank Select
Indirect Addressing
Direct Addressing
Data
Memory(1)
0Fh
10h
Bank 0
Bank 1(2)
0
4
5
6
(FSR)
00
01
00h
1Fh
3Fh
(opcode)
0
4
5
6
(FSR)
Addresses
map back to
addresses
in Bank 0.
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