參數(shù)資料
型號: PIC12F683-E/MD
廠商: Microchip Technology
文件頁數(shù): 137/176頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 8DFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
Digi-Key 應(yīng)用說明: AN0005 PWM Example with Microchip's CCP Module
AN0005 Example Code
標(biāo)準(zhǔn)包裝: 91
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 8-VDFN 裸露焊盤
包裝: 管件
配用: AC164326-ND - MODULA SKT PM3 20QFN
I3-DB12F683-ND - BOARD DAUGHTER ICEPIC3
2007 Microchip Technology Inc.
DS41211D-page 61
PIC12F683
9.0
ANALOG-TO-DIGITAL
CONVERTER (ADC) MODULE
The
Analog-to-Digital
Converter
(ADC)
allows
conversion of an analog input signal to a 10-bit binary
representation of that signal. This device uses analog
inputs, which are multiplexed into a single sample and
hold circuit. The output of the sample and hold is
connected to the input of the converter. The converter
generates a 10-bit binary result via successive
approximation and stores the conversion result into the
ADC result registers (ADRESL and ADRESH).
The ADC voltage reference is software selectable to
either VDD or a voltage applied to the external reference
pins.
The ADC can generate an interrupt upon completion of
a conversion. This interrupt can be used to wake-up the
device from Sleep.
Figure 9-1 shows the block diagram of the ADC.
FIGURE 9-1:
ADC BLOCK DIAGRAM
9.1
ADC Configuration
When configuring and using the ADC the following
functions must be considered:
GPIO configuration
Channel selection
ADC voltage reference selection
ADC conversion clock source
Interrupt control
Results formatting
9.1.1
GPIO CONFIGURATION
The ADC can be used to convert both analog and digital
signals. When converting analog signals, the I/O pin
should be configured for analog by setting the associated
TRIS and ANSEL bits. See the corresponding GPIO
section for more information.
9.1.2
CHANNEL SELECTION
The CHS bits of the ADCON0 register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay is required before
starting the next conversion. Refer to Section 9.2
“ADC Operation” for more information.
GP0/AN0
A/D
GP1/AN1/VREF
GP2/AN2
VDD
VREF
ADON
GO/DONE
VCFG = 1
VCFG = 0
CHS
ADRESH
ADRESL
10
ADFM
GP4/AN3
0
= Left Justify
1
= Right Justify
Note:
Analog voltages on any pin that is defined
as a digital input may cause the input
buffer to conduct excess current.
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