參數(shù)資料
型號： PIC14000-04/SP
廠商： Microchip Technology
文件頁數(shù)： 11/153頁
文件大?。?/td> 0K
描述： IC MCU OTP 4KX14 A/D 28DIP
產(chǎn)品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 15
系列： PIC® 14
核心處理器： PIC
芯體尺寸： 8-位
速度： 4MHz
連通性： I²C
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 20
程序存儲器容量： 7KB（4K x 14）
程序存儲器類型： OTP
RAM 容量： 192 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器： 斜率 A/D
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 28-DIP（0.300"，7.62mm）
包裝： 管件
配用： ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
ICE2000-ND - EMULATOR MPLAB-ICE 2000 POD
PIC14000
DS40122B-page 108
Preliminary
1996 Microchip Technology Inc.
13.1
DC Characteristics:
PIC14000
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40
°C
≤ TA ≤ + 85°C for industrial and
0
°C ≤ TA ≤ +70°C for commercial
Operating voltage VDD = 2.7V to 6.0V
Characteristic
Sym
Min
Typ Max Units
Conditions
Supply Voltage
VDD
2.7
4.5
—
6.0
5.5
V
IN or HS at Fosc
≤ 4 MHz
HS at Fosc > 4 MHz
RAM Data Retention
Voltage (Note 1)
VDR
—
1.5
—
V
Device in SLEEP mode
VDD start voltage to
guarantee Power-On Reset
VPOR
—
VSS
—
V
See section on power-on reset for details
VDD rise rate to guarantee
Power-On Reset
SVDD
0.05*
——
V/ms
See section on power-on reset for details
Operating Current in SLEEP Mode (Note 2)
During A/D conversion:
all analog on and internal
oscillator active
IPD1
—
TBD
900
1250
A
VDD = 3.0V
VDD = 4.0V
Comparator interrupt enabled:
level-shift, programmable
reference, and comparator active
IPD2
—
75
95
100
125
A
VDD = 3.0V, CMOFF = 0, LSOFF = 0, REFOFF = 0
VDD = 4.0V, CMOFF = 0, LSOFF = 0, REFOFF = 0
All analog off, WDT on (Note 5)
IPD3
—
7.5
10.5
20
28
A
VDD = 3.0V
VDD = 4.0V
All analog off, WDT off
(Hibernate mode) (Note 5)
IPD4
—
0.9
1.5
12
16
A
VDD = 3.0V
VDD = 4.0V
Operating Supply Current (Note 2, 4)
Internal oscillator mode
I
DD
—
2.2
TBD
mA
Fosc = 4 MHz, VDD = 5.5V
—
1.1
TBD
mA
Fosc = 4 MHz, VDD = 3.0V
HS oscillator mode
—
2.4
1.2
10
TBD
mA
Fosc = 4 MHz, VDD = 5.5V
Fosc = 4 MHz, VDD = 3.0V
Fosc = 20 MHz, VDD = 5.5V
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1=external square wave, from rail to rail; all I/O pins tristated, pulled to VDD.
MCLR = VDD; WDT enabled/disabled as specied.
3: Measured with all inputs at rails, no DC loads. IPD1 measured with internal oscillator active.
4: IDD values of individual analog module cannot be tested independently but are characterized.
5: Worst-case IPD conditions with all conguration bits unprogrammed. Programming conguration bits
may reduce IPD.
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