參數(shù)資料
型號: PIC16C505-20I/SL
廠商: Microchip Technology
文件頁數(shù): 5/90頁
文件大小: 0K
描述: IC MCU OTP 1KX12 14SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 57
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 11
程序存儲器容量: 1.5KB(1K x 12)
程序存儲器類型: OTP
RAM 容量: 72 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1086-ND - ADAPTER 14-ZIF BD W/14-SO PLUGS
309-1085-ND - ADAPTER 14-DIP BD W/2 14-SO PLUG
309-1001-ND - ADAPTER 14-SOIC TO 14-DIP
309-1000-ND - ADAPTER 14-SOIC TO 14-DIP
1999-2012 Microchip Technology Inc.
DS40192D-page 13
PIC16C505
4.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control
the operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset
Value on
All Other
Resets(2)
00h
INDF
Uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
uuuu uuuu
01h
TMR0
8-bit real-time clock/counter
xxxx xxxx
uuuu uuuu
02h(1)
PCL
Low order 8 bits of PC
1111 1111
03h
STATUS
RBWUF
—PAO
TO
PD
ZDC
C
0001 1xxx
q00q quuu
(1)
04h
FSR
Indirect data memory address pointer
110x xxxx
11uu uuuu
05h
OSCCAL
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
1000 00--
uuuu uu--
N/A
TRISB
I/O control registers
--11 1111
N/A
TRISC
I/O control registers
--11 1111
N/A
OPTION
RBWU
RBPU
TOCS
TOSE
PSA
PS2
PS1
PS0
1111 1111
06h
PORTB
RB5
RB4
RB3
RB2
RB1
RB0
--xx xxxx
--uu uuuu
07h
PORTC
RC5
RC4
RC3
RC2
RC1
RC0
--xx xxxx
--uu uuuu
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as ‘0’, x = unknown, u = unchanged,
q = depends on condition.
Note 1:
If reset was due to wake-up on pin change, then bit 7 = 1. All other rests will cause bit 7 = 0.
Note 2:
Other (non-power-up) resets include external reset through MCLR, watchdog timer and wake-up on pin change reset.
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