2002 Microchip Technology Inc.
Preliminary
DS30453D-page 25
PIC16C5X
6.0
MEMORY ORGANIZATION
PIC16C5X memory is organized into program memory
and data memory. For devices with more than 512
bytes of program memory, a paging scheme is used.
Program memory pages are accessed using one or two
STATUS Register bits. For devices with a data memory
register file of more than 32 registers, a banking
scheme is used. Data memory banks are accessed
using the File Selection Register (FSR).
6.1
Program Memory Organization
The PIC16C54, PIC16CR54 and PIC16C55 have a 9-
bit Program Counter (PC) capable of addressing a 512
PIC16C56 and PIC16CR56 have a 10-bit Program
Counter (PC) capable of addressing a 1K x 12 program
memory
space
The
PIC16CR57,
PIC16C58 and PIC16CR58 have an 11-bit Program
Counter capable of addressing a 2K x 12 program
above the physically implemented address will cause a
wraparound.
A NOP at the RESET vector location will cause a restart
at location 000h. The RESET vector for the PIC16C54,
PIC16CR54 and PIC16C55 is at 1FFh. The RESET
vector for the PIC16C56 and PIC16CR56 is at 3FFh.
The RESET vector for the PIC16C57, PIC16CR57,
PIC16C58,
and
PIC16CR58
is
at
7FFh.
See
GOTO
instructions.
FIGURE 6-1:
PIC16C54/CR54/C55
PROGRAM MEMORY MAP
AND STACK
FIGURE 6-2:
PIC16C56/CR56
PROGRAM MEMORY MAP
AND STACK
FIGURE 6-3:
PIC16C57/CR57/C58/
CR58 PROGRAM
MEMORY MAP AND
STACK
PC<8:0>
Stack Level 1
Stack Level 2
User
M
e
mory
Sp
a
c
e
CALL, RETLW
9
000h
1FFh
RESET Vector
0FFh
100h
On-chip
Program
Memory
PC<9:0>
Stack Level 1
Stack Level 2
User
Mem
o
ry
Space
10
000h
1FFh
RESET Vector
0FFh
100h
On-chip Program
Memory (Page 0)
On-chip Program
Memory (Page 1)
200h
2FFh
300h
3FFh
CALL, RETLW
PC<10:0>
Stack Level 1
Stack Level 2
User
M
e
mory
Sp
a
c
e
11
000h
1FFh
RESET Vector
0FFh
100h
On-chip Program
Memory (Page 0)
On-chip Program
Memory (Page 1)
On-chip Program
Memory (Page 2)
On-chip Program
Memory (Page 3)
200h
3FFh
2FFh
300h
400h
5FFh
4FFh
500h
600h
7FFh
6FFh
700h
CALL, RETLW
