參數(shù)資料
型號: PIC16C63-04/SP
廠商: Microchip Technology
文件頁數(shù): 93/126頁
文件大?。?/td> 0K
描述: IC MCU OTP 4KX14 PWM 28DIP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 15
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 7KB(4K x 14)
程序存儲器類型: OTP
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
配用: DVMCPA-ND - KIT DVR BOARD EVAL SYSTEM MXDEV1
69
AT90S/LS4433
1042H–AVR–04/03
Bit 5 – ADFR: ADC Free Run Select
When this bit is set (one), the ADC operates in Free Run mode. In this mode, the ADC
samples and updates the Data Registers continuously. Clearing this bit (zero) will termi-
nate Free Run mode.
Bit 4 – ADIF: ADC Interrupt Flag
This bit is set (one) when an ADC conversion completes and the Data Registers are
updated. The ADC Conversion Complete interrupt is executed if the ADIE bit and the I-
bit in SREG are set (one). ADIF is cleared by hardware when executing the correspond-
ing interrupt handling vector. Alternatively, ADIF is cleared by writing a logical “1” to the
flag. Beware that if doing a Read-Modify-Write on ADCSR, a pending interrupt can be
disabled. This also applies if the SBI and CBI instructions are used.
Bit 3 – ADIE: ADC Interrupt Enable
When this bit is set (one) and the I-bit in SREG is set (one), the ADC Conversion Com-
plete interrupt is activated.
Bits 2..0 – ADPS2..ADPS0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency and the input
clock to the ADC.
ADC Data Register – ADCL
AND ADCH
When an ADC conversion is complete, the result is found in these two registers. In Free
Run mode, it is essential that both registers are read and that ADCL is read before
ADCH.
Table 22. ADC Prescaler Selections
ADPS2
ADPS1
ADPS0
Division Factor
00
0
2
00
1
2
01
0
4
01
1
8
10
0
16
10
1
32
11
0
64
1
128
Bit
151413121110
9
8
$05 ($25)
––––
––
ADC9
ADC8
ADCH
$04 ($26)
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
ADCL
7654
321
0
Read/Write
R
RRRR
RRR
R
RRRR
RRR
Initial Value
0000
000
0
0000
000
0
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