參數(shù)資料
型號： PIC16C63A
廠商： Microchip Technology Inc.
英文描述： 8-Bit CMOS Microcontrollers with A/D Converter(8位、帶A/D轉(zhuǎn)換器的CMOS微控制器)
中文描述： 8位CMOS微控制器與A / D轉(zhuǎn)換器（8位，帶的A / D轉(zhuǎn)換器的的CMOS微控制器）
文件頁數(shù)： 83/184頁
文件大?。?/td> 2230K
代理商： PIC16C63A
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2000 Microchip Technology Inc.
DS30605C-page 83
PIC16C63A/65B/73B/74B
12.2
Selecting the A/D Conversion
Clock
The A/D conversion time per bit is defined as T
AD
. The
A/D conversion requires 9.5 T
AD
per 8-bit conversion.
The source of the A/D conversion clock is software
selectable. The four possible options for T
AD
are:
2 T
OSC
8 T
OSC
32 T
OSC
Internal RC oscillator (2 - 6
μ
S)
For correct A/D conversions, the A/D conversion clock
(T
AD
) must be selected to ensure a minimum T
AD
time
(parameter #130).
12.3
Configuring Analog Port Pins
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared (out-
put), the digital output level (V
OH
or V
OL
) will be
converted.
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
12.4
A/D Conversions
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The ADRES register will
NOT be updated with the partially completed A/D con-
version sample. That is, the ADRES register will con-
tinue to contain the value of the last completed
conversion (or the last value written to the ADRES reg-
ister). After the A/D conversion is aborted, a 2 T
AD
wait
is required before the next acquisition is started. After
this 2 T
AD
wait, an acquisition is automatically started
on the selected channel. The GO/DONE bit can then
be set to start another conversion.
12.5
A/D Operation During SLEEP
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 =
11
). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the
SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES register. If the
A/D interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a
SLEEP
instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
12.6
Effects of a RESET
A device RESET forces all registers to their RESET
state. The A/D module is disabled and any conversion
in progress is aborted. All pins with analog functions
are configured as analog inputs.
The ADRES register will contain unknown data after a
Power-on Reset.
12.7
Use of the CCP Trigger
An A/D conversion can be started by the
“
special event
trigger
”
of the CCP2 module. This requires that the
CCP2M3:CCP2M0 bits (CCP2CON<3:0>) be pro-
grammed as
1011
and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and the minimum acquisition
done before the
“
special event trigger
”
sets the
GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the
“
special event trigger
”
will be ignored by the
A/D module, but will still reset the Timer1 counter.
Note 1:
When reading the port register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
2:
Analog levels on any pin that is defined as
a digital input, but not as an analog input,
may cause the input buffer to consume
current that is out of the devices specifi-
cation.
3:
The TRISE register is not provided on the
PIC16C73B.
Note:
The GO/DONE bit should
NOT
be set in
the same instruction that turns on the A/D.
Note:
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 =
11
). To perform an A/D
conversion in SLEEP, ensure the
SLEEP
instruction immediately follows the instruc-
tion that sets the GO/DONE bit.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC16C63A/JW 功能描述:8位微控制器 -MCU 7KB 192 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16C63A-04/SO 功能描述:8位微控制器 -MCU 7KB 192 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16C63A-04/SO 制造商:Microchip Technology Inc 功能描述:8BIT CMOS MCU SMD 16C63 SOIC28
PIC16C63A-04/SP 功能描述:8位微控制器 -MCU 7KB 192 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16C63A-04/SP 制造商:Microchip Technology Inc 功能描述:IC 8BIT CMOS MCU 16C63 SDIL28
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