參數(shù)資料
型號(hào): PIC16C715
廠商: Microchip Technology Inc.
英文描述: 8-Bit CMOS Microcontroller with A/D Converter(每個(gè)I/O口有25mA驅(qū)動(dòng)/吸收電流,微控制器)
中文描述: 8位CMOS微控制器與A / D轉(zhuǎn)換器(每個(gè)的I / O口有25毫安驅(qū)動(dòng)/吸收電流,微控制器)
文件頁(yè)數(shù): 25/120頁(yè)
文件大小: 764K
代理商: PIC16C715
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1996 Microchip Technology Inc.
Advance Information
DS30560A-page 25
PIC16C715
5.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a bit
in the TRISB register puts the corresponding output
driver in a hi-impedance input mode. Clearing a bit in
the TRISB register puts the contents of the output latch
on the selected pin(s).
EXAMPLE 5-2:
INITIALIZING PORTB
PORTB and TRISB Registers
CLRF PORTB ; Initialize PORTB by
; clearing output
; data latches
BSF STATUS, RP0 ; Select Bank 1
MOVLW 0xCF ; Value used to
; initialize data
; direction
MOVWF TRISB ; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
performed by clearing bit RBPU (OPTION<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.
FIGURE 5-3:
BLOCK DIAGRAM OF
RB3:RB0 PINS
Data Latch
D
RBPU
(2)
P
V
DD
Q
CK
Q
D
CK
Q
D
EN
Data bus
WR Port
WR TRIS
RD TRIS
RD Port
weak
pull-up
RD Port
RB0/INT
I/O
pin
(1)
TTL
Input
Buffer
Note 1: I/O pins have diode protection to V
DD
and V
SS
.
2: TRISB = '1' enables weak pull-up if RBPU = '0'
(OPTION<7>).
Schmitt Trigger
Buffer
TRIS Latch
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
Any read or write of PORTB. This will end the
mismatch condition.
b)
Clear flag bit RBIF.
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
This interrupt on mismatch feature, together with soft-
ware configurable pull-ups on these four pins allow
easy interface to a keypad and make it possible for
wake-up on key-depression. Refer to the Embedded
Control Handbook,
"Implementing Wake-Up on Key
Stroke"
(AN552).
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 5-4:
BLOCK DIAGRAM OF
RB7:RB4 PINS
Data Latch
D
From other
RB7:RB4 pins
RBPU
(2)
P
V
DD
I/O
pin
(1)
Q
CK
Q
D
CK
Q
D
EN
Q
D
EN
Data bus
WR Port
WR TRIS
Set RBIF
TRIS Latch
RD TRIS
RD Port
weak
pull-up
RD Port
Latch
TTL
Input
Buffer
Note 1: I/O pins have diode protection to V
DD
and V
SS
.
2: TRISB = '1' enables weak pull-up if RBPU = '0'
(OPTION<7>).
ST
Buffer
RB7:RB6 in serial programming mode
Q3
Q1
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