100h(4) INDF Addressing this location u" />
  • 參數(shù)資料
    型號: PIC16C73A-04I/SP
    廠商: Microchip Technology
    文件頁數(shù): 37/114頁
    文件大小: 0K
    描述: IC MCU OTP 4KX14 A/D PWM 28DIP
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    8-bit PIC® Microcontroller Portfolio
    標(biāo)準(zhǔn)包裝: 15
    系列: PIC® 16C
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 4MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
    輸入/輸出數(shù): 22
    程序存儲器容量: 7KB(4K x 14)
    程序存儲器類型: OTP
    RAM 容量: 192 x 8
    電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8b
    振蕩器型: 外部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 28-DIP(0.300",7.62mm)
    包裝: 管件
    1997 Microchip Technology Inc.
    DS30390E-page 29
    PIC16C7X
    Bank 2
    100h(4)
    INDF
    Addressing this location uses contents of FSR to address data memory (not a physical register)
    0000 0000
    101h
    TMR0
    Timer0 module’s register
    xxxx xxxx
    uuuu uuuu
    102h(4)
    PCL
    Program Counter's (PC) Least Signicant Byte
    0000 0000
    103h(4)
    STATUS
    IRP
    RP1
    RP0
    TO
    PD
    ZDC
    C
    0001 1xxx
    000q quuu
    104h(4)
    FSR
    Indirect data memory address pointer
    xxxx xxxx
    uuuu uuuu
    105h
    Unimplemented
    106h
    PORTB
    PORTB Data Latch when written: PORTB pins when read
    xxxx xxxx
    uuuu uuuu
    107h
    Unimplemented
    108h
    Unimplemented
    109h
    Unimplemented
    10Ah(1,4)
    PCLATH
    Write Buffer for the upper 5 bits of the Program Counter
    ---0 0000
    10Bh(4)
    INTCON
    GIE
    PEIE
    T0IE
    INTE
    RBIE
    T0IF
    INTF
    RBIF
    0000 000x
    0000 000u
    10Ch-
    10Fh
    Unimplemented
    Bank 3
    180h(4)
    INDF
    Addressing this location uses contents of FSR to address data memory (not a physical register)
    0000 0000
    181h
    OPTION
    RBPU
    INTEDG
    T0CS
    T0SE
    PSA
    PS2
    PS1
    PS0
    1111 1111
    182h(4)
    PCL
    Program Counter's (PC) Least Signicant Byte
    0000 0000
    183h(4)
    STATUS
    IRP
    RP1
    RP0
    TO
    PD
    ZDC
    C
    0001 1xxx
    000q quuu
    184h(4)
    FSR
    Indirect data memory address pointer
    xxxx xxxx
    uuuu uuuu
    185h
    Unimplemented
    186h
    TRISB
    PORTB Data Direction Register
    1111 1111
    187h
    Unimplemented
    188h
    Unimplemented
    189h
    Unimplemented
    18Ah(1,4)
    PCLATH
    Write Buffer for the upper 5 bits of the Program Counter
    ---0 0000
    18Bh(4)
    INTCON
    GIE
    PEIE
    T0IE
    INTE
    RBIE
    T0IF
    INTF
    RBIF
    0000 000x
    0000 000u
    18Ch-
    18Fh
    Unimplemented
    TABLE 4-3:
    PIC16C76/77 SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)
    Address
    Name
    Bit 7
    Bit 6
    Bit 5
    Bit 4
    Bit 3
    Bit 2
    Bit 1
    Bit 0
    Value on:
    POR,
    BOR
    Value on all
    other resets
    (2)
    Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0'.
    Shaded locations are unimplemented, read as ‘0’.
    Note 1:
    The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose con-
    tents are transferred to the upper byte of the program counter.
    2:
    Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
    3:
    Bits PSPIE and PSPIF are reserved on the PIC16C76, always maintain these bits clear.
    4:
    These registers can be addressed from any bank.
    5:
    PORTD and PORTE are not physically implemented on the PIC16C76, read as ‘0’.
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