參數(shù)資料
型號: PIC16C73A-10I/SP
廠商: Microchip Technology
文件頁數(shù): 10/114頁
文件大小: 0K
描述: IC MCU OTP 4KX14 A/D PWM 28DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 15
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 10MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 7KB(4K x 14)
程序存儲器類型: OTP
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
1997 Microchip Technology Inc.
DS30390E-page 107
PIC16C7X
Steps to follow when setting up an Asynchronous
Transmission:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 12.1)
2.
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
3.
If interrupts are desired, then set enable bit
TXIE.
4.
If 9-bit transmission is desired, then set transmit
bit TX9.
5.
Enable the transmission by setting bit TXEN,
which will also set bit TXIF.
6.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
7.
Load data to the TXREG register (starts trans-
mission).
FIGURE 12-8: ASYNCHRONOUS MASTER TRANSMISSION
FIGURE 12-9: ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
TABLE 12-6:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Ch
PIR1
PSPIF(1)
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
0000 0000
18h
RCSTA
SPEN
RX9
SREN
CREN
FERR
OERR
RX9D
0000 -00x
19h
TXREG
USART Transmit Register
0000 0000
8Ch
PIE1
PSPIE(1)
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
0000 0000
98h
TXSTA
CSRC
TX9
TXEN
SYNC
BRGH
TRMT
TX9D
0000 -010
99h
SPBRG
Baud Rate Generator Register
0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Transmission.
Note 1:
Bits PSPIE and PSPIF are reserved on the PIC16C73/73A/76, always maintain these bits clear.
WORD 1
Stop Bit
WORD 1
Transmit Shift Reg
Start Bit
Bit 0
Bit 1
Bit 7/8
Write to TXREG
Word 1
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty ag)
TRMT bit
(Transmit shift
reg. empty ag)
Transmit Shift Reg.
Write to TXREG
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. ag)
TRMT bit
(Transmit shift
reg. empty ag)
Word 1
Word 2
WORD 1
WORD 2
Start Bit
Stop Bit
Start Bit
Transmit Shift Reg.
WORD 1
WORD 2
Bit 0
Bit 1
Bit 7/8
Bit 0
Note: This timing diagram shows two consecutive transmissions.
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