PIC16C7X
DS30390E-page 278
1997 Microchip Technology Inc.
Synchronous Serial Port Mode Select bits,
SSPM3:SSPM0 ............................................................79, 84
Synchronous Serial Port Module ........................................77
Synchronous Serial Port Status Register ...........................83
T
T0CS bit .............................................................................31
T1CKPS0 bit ......................................................................65
T1CKPS1 bit ......................................................................65
T1CON ...............................................................................29
T1CON Register ...........................................................29, 65
T1OSCEN bit .....................................................................65
T1SYNC bit ........................................................................65
T2CKPS0 bit ......................................................................70
T2CKPS1 bit ......................................................................70
T2CON Register ...........................................................29, 70
T
AD
...................................................................................121
Timer Modules, Overview ..................................................57
Timer0
RTCC .......................................................................136
Timers
Timer0
Block Diagram ....................................................59
External Clock ....................................................61
External Clock Timing ........................................61
Increment Delay .................................................61
Interrupt ..............................................................59
Interrupt Timing ..................................................60
Overview ............................................................57
Prescaler ............................................................62
Prescaler Block Diagram ...................................62
Section ...............................................................59
Switching Prescaler Assignment ........................63
Synchronization .................................................61
T0CKI .................................................................61
T0IF ..................................................................143
Timing ................................................................59
TMR0 Interrupt .................................................143
Timer1
Asynchronous Counter Mode ............................67
Block Diagram ....................................................66
Capacitor Selection ............................................67
External Clock Input ...........................................66
External Clock Input Timing ...............................67
Operation in Timer Mode ...................................66
Oscillator ............................................................67
Overview ............................................................57
Prescaler ......................................................66, 68
Resetting of Timer1 Registers ...........................68
Resetting Timer1 using a CCP Trigger Output ..68
Synchronized Counter Mode .............................66
T1CON ...............................................................65
TMR1H ...............................................................67
TMR1L ...............................................................67
Timer2
Block Diagram ....................................................69
Module ...............................................................69
Overview ............................................................57
Postscaler ..........................................................69
Prescaler ............................................................69
T2CON ...............................................................70
Timing Diagrams
A/D Conversion ................................182, 200, 218, 239
Brown-out Reset ..............................134, 175, 209, 228
Capture/Compare/PWM ...................177, 193, 211, 230
CLKOUT and I/O ..............................174, 190, 208, 227
External Clock Timing ...................... 173, 189, 207, 226
I
2
C Bus Data .................................... 180, 197, 215, 236
I
2
C Bus Start/Stop bits ..................... 179, 196, 214, 235
I
2
C Clock Synchronization ......................................... 92
I
2
C Data Transfer Wait State ..................................... 90
I
2
C Multi-Master Arbitration ....................................... 92
I
2
C Reception (7-bit Address) .................................... 95
Parallel Slave Port ................................................... 194
Power-up Timer ............................... 175, 191, 209, 228
Reset ............................................... 175, 191, 209, 228
SPI Master Mode ....................................................... 87
SPI Mode ................................................. 178, 195, 213
SPI Mode, Master/Slave Mode, No SS Control ......... 82
SPI Mode, Slave Mode With SS Control ................... 82
SPI Slave Mode (CKE = 1) ........................................ 88
SPI Slave Mode Timing (CKE = 0) ............................ 87
Start-up Timer .................................. 175, 191, 209, 228
Time-out Sequence ................................................. 139
Timer0 ....................................... 59, 176, 192, 210, 229
Timer0 Interrupt Timing ............................................. 60
Timer0 with External Clock ........................................ 61
Timer1 ............................................. 176, 192, 210, 229
USART Asynchronous Master Transmission .......... 107
USART Asynchronous Reception ........................... 108
USART RX Pin Sampling ................................ 104, 105
USART Synchronous Receive ................ 198, 216, 237
USART Synchronous Reception ............................. 113
USART Synchronous Transmission 111, 198, 216, 237
Wake-up from Sleep via Interrupt ............................ 146
Watchdog Timer .............................. 175, 191, 209, 228
TMR0 ................................................................................. 29
TMR0 Register ............................................................. 25, 27
TMR1CS bit ....................................................................... 65
TMR1H .............................................................................. 29
TMR1H Register .................................................... 23, 25, 27
TMR1IE bit ......................................................................... 33
TMR1IF bit ................................................................... 35, 36
TMR1L ............................................................................... 29
TMR1L Register ..................................................... 23, 25, 27
TMR1ON bit ....................................................................... 65
TMR2 ................................................................................. 29
TMR2 Register ....................................................... 23, 25, 27
TMR2IE bit ......................................................................... 33
TMR2IF bit ................................................................... 35, 36
TMR2ON bit ....................................................................... 70
TO bit ................................................................................. 30
TOUTPS0 bit ..................................................................... 70
TOUTPS1 bit ..................................................................... 70
TOUTPS2 bit ..................................................................... 70
TOUTPS3 bit ..................................................................... 70
TRISA ................................................................................ 29
TRISA Register ................................................ 24, 26, 28, 43
TRISB ................................................................................ 29
TRISB Register ................................................ 24, 26, 28, 45
TRISC ................................................................................ 29
TRISC Register ................................................ 24, 26, 28, 48
TRISD ................................................................................ 29
TRISD Register ...................................................... 26, 28, 50
TRISE ................................................................................ 29
TRISE Register ...................................................... 26, 28, 51
Two’s Complement .............................................................. 9
TXIE bit .............................................................................. 34
TXIF bit .............................................................................. 36
TXREG .............................................................................. 29
TXSTA ............................................................................... 29
TXSTA Register ................................................................. 99