參數(shù)資料
型號: PIC16CR76T-I/ML
廠商: Microchip Technology
文件頁數(shù): 159/172頁
文件大小: 0K
描述: IC PIC MCU 8KX14 28QFN
標準包裝: 1,600
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 14KB(8K x 14)
程序存儲器類型: ROM
RAM 容量: 368 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 5x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 帶卷 (TR)
2007 Microchip Technology Inc.
DS39599G-page 85
PIC18F2220/2320/4220/4320
8.0
8 X 8 HARDWARE MULTIPLIER
8.1
Introduction
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18F2X20/4X20 devices. By making the multiply
a hardware operation, it completes in a single instruc-
tion cycle. This is an unsigned multiply that gives a
16-bit result. The result is stored into the 16-bit product
register pair (PRODH:PRODL). The multiplier does not
affect any flags in the STATUS register.
Making the 8 x 8 multiplier execute in a single-cycle
gives the following advantages:
Higher computational throughput
Reduces code size requirements for multiply
algorithms
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 8-1 shows a performance comparison between
enhanced devices using the single-cycle hardware
multiply and performing the same function without the
hardware multiply.
8.2
Operation
Example 8-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 8-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 8-1:
8 x 8 UNSIGNED
MULTIPLY ROUTINE
EXAMPLE 8-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
TABLE 8-1:
PERFORMANCE COMPARISON
MOVF
ARG1, W
;
MULWF
ARG2
; ARG1 * ARG2 ->
;
PRODH:PRODL
MOVF
ARG1, W
MULWF
ARG2
; ARG1 * ARG2 ->
; PRODH:PRODL
BTFSC
ARG2, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG1
MOVF
ARG2, W
BTFSC
ARG1, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG2
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 40 MHz
@ 10 MHz
@ 4 MHz
8 x 8 unsigned
Without hardware multiply
13
69
6.9
μs
27.6
μs
69
μs
Hardware multiply
1
100 ns
400 ns
1
μs
8 x 8 signed
Without hardware multiply
33
91
9.1
μs
36.4
μs
91
μs
Hardware multiply
6
600 ns
2.4
μs6 μs
16 x 16 unsigned
Without hardware multiply
21
242
24.2
μs
96.8
μs242 μs
Hardware multiply
28
2.8
μs11.2 μs28 μs
16 x 16 signed
Without hardware multiply
52
254
25.4
μs102.6 μs254 μs
Hardware multiply
35
40
4.0
μs
16.0
μs
40
μs
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