參數(shù)資料
型號： PIC16F526T-I/ST
廠商： Microchip Technology
文件頁數(shù)： 73/122頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 1KX12 14TSSOP
標準包裝： 2,500
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設備： POR，WDT
輸入/輸出數(shù)： 11
程序存儲器容量： 1.5KB（1K x 12）
程序存儲器類型： 閃存
RAM 容量： 67 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 3x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
包裝： 帶卷 (TR)
配用： ICE2000-ND - EMULATOR MPLAB-ICE 2000 POD
其它名稱： PIC16F526T-I/STTR
PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 54
2009 Microchip Technology Inc.
5.6
Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations, as indicated in Table 5-3. These bits
are used in software to determine the nature of the
Reset.
Table 5-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
TABLE 5-3:
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION
FOR RCON REGISTER
Condition
Program
Counter
RCON Register
STKPTR Register
RI
TO
PD
POR BOR STKFUL
STKUNF
Power-on Reset
0000h
11
100
0
RESET Instruction
0000h
0u
uuu
u
Brown-out
0000h
11
1u0
u
MCLR during power-managed Run modes
0000h
u1
uuu
u
MCLR during power-managed Idle modes
and Sleep mode
0000h
u1
0uu
u
WDT Time-out during full power or
power-managed Run mode
0000h
u0
uuu
u
MCLR during full power execution
0000h
uu
uuu
u
Stack Full Reset (STVREN = 1)
0000h
uu
uuu
1
u
Stack Underflow Reset (STVREN = 1)
0000h
uu
uuu
u
1
Stack Underflow Error (not an actual Reset,
STVREN = 0)
0000h
uu
uuu
u
1
WDT time-out during power-managed Idle or
Sleep modes
PC + 2
u0
0uu
u
Interrupt exit from power-managed modes
PC + 2(1)
uu
0uu
u
Legend: u = unchanged
Note 1:
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (008h or 0018h).
2:
Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled
(BOREN<1:0> Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’.
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