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PIC16F5X
DS41213D-page 58
2007 Microchip Technology Inc.
11.0
ELECTRICAL SPECIFICATIONS FOR PIC16F59 (continued)
Absolute Maximum Ratings()
Ambient Temperature under bias .........................................................................................................-40°C to +125°C
Storage Temperature............................................................................................................................-65°C to +150°C
Voltage on VDD with respect to VSS ............................................................................................................ 0V to +6.5V
Voltage on MCLR with respect to VSS(1) ................................................................................................... 0V to +13.5V
Voltage on all other pins with respect to VSS................................................................................ -0.6V to (VDD + 0.6V)
Total power dissipation(2) ..................................................................................................................................900 mW
Max. current out of VSS pins...............................................................................................................................250 mA
Max. current into VDD pins .................................................................................................................................200 mA
Max. current into an input pin (T0CKI only).......................................................................................................±500
μA
Input clamp current, IIK (VI < 0 or VI > VDD) .......................................................................................................±20 mA
Output clamp current, IOK (VO < 0 or VO > VDD) ................................................................................................±20 mA
Max. output current sunk by any I/O pin...............................................................................................................25 mA
Max. output current sourced by any I/O pin .........................................................................................................25 mA
Max. output current sourced by a single I/O port (PORTA, B, C, D or E)...........................................................100 mA
Max. output current sunk by a single I/O port (PORTA, B, C, D or E) ................................................................100 mA
Note 1: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up.
Thus, a series resistor of 50 to 100
Ω should be used when applying a “l(fā)ow” level to the MCLR pin rather
than pulling this pin directly to VSS.
2: Power Dissipation is calculated as follows: Pdis = VDD x {IDD –
∑ IOH} + ∑ {(VDD – VOH) x IOH} + ∑(VOL x IOL)
NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.