參數(shù)資料
型號(hào): PIC16F716T-I/SS
廠商: Microchip Technology
文件頁數(shù): 44/136頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 20SSOP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
配用: I3-DB16F716-ND - BOARD DAUGHTER ICEPIC3
AC162054-ND - HEADER INTERFACE ICD2 16F716
2007 Microchip Technology Inc.
DS41206B-page 13
PIC16F716
2.2.2.3
INTCON Register
The INTCON Register is a readable and writable
register which contains various enable and flag bits for
the TMR0 register overflow, RB Port change and
external RB0/INT pin interrupts.
Note:
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE of the INTCON register.
User
software
should
ensure
the
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
REGISTER 2-3:
INTCON: INTERRUPT CONTROL REGISTER
R/W-0
R/W-x
GIE
PEIE
T0IE
INTE
RBIE(1)
T0IF(2)
INTF
RBIF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GIE: Global Interrupt Enable bit
1
= Enables all unmasked interrupts
0
= Disables all interrupts
bit 6
PEIE: Peripheral Interrupt Enable bit
1
= Enables all unmasked peripheral interrupts
0
= Disables all peripheral interrupts
bit 5
T0IE: Timer0 Overflow Interrupt Enable bit
1
= Enables the Timer0 interrupt
0
= Disables the Timer0 interrupt
bit 4
INTE: RB0/INT External Interrupt Enable bit
1
= Enables the RB0/INT external interrupt
0
= Disables the RB0/INT external interrupt
bit 3
RBIE: PORTB Change Interrupt Enable bit(1)
1
= Enables the PORTB change interrupt
0
= Disables the PORTB change interrupt
bit 2
T0IF: Timer0 Overflow Interrupt Flag bit(2)
1
= TMR0 register has overflowed (must be cleared in software)
0
= TMR0 register did not overflow
bit 1
INTF: RB0/INT External Interrupt Flag bit
1
= The RB0/INT external interrupt occurred (must be cleared in software)
0
= The RB0/INT external interrupt did not occur
bit 0
RBIF: PORTB Change Interrupt Flag bit
1
= When at least one of the PORTB general purpose I/O pins changed state (must be cleared in
software)
0
= None of the PORTB general purpose I/O pins have changed state
Note 1:
IOCB register must also be enabled.
2:
T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should be initialized before
clearing T0IF bit.
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