參數(shù)資料
型號： PIC16F785
廠商： Microchip Technology Inc.
英文描述： 20-Pin Flash-Based 8-Bit CMOS Microcontroller with Two-Phase Asychronous Feedback PWM, Dual High-Speed Comparators and Dual Operational Amplifiers
中文描述： 20引腳基于閃存的8兩相異步反饋的PWM，雙高位CMOS微控制器的高速比較器和雙運算放大器
文件頁數(shù)： 23/178頁
文件大小： 1620K
代理商： PIC16F785
2004 Microchip Technology Inc.
Preliminary
DS41249A-page 21
PIC16F785
2.3
PCL and PCLATH
The Program Counter (PC) specifies the address of the
instruction to fetch for execution. The program counter
is 13 bits wide. The low byte is called the PCL register.
The PCL register readable and writable. The high byte
of the PC (PC<12:8>) is called the PCH register. This
register contains PC<12:8> bits which are not directly
readable or writable. All updates to the PCH register go
through the PCLATH register.
On any Reset, the PC is cleared. Figure 2-3 shows the
two situations for the loading of the PC. The upper
example in Figure 2-3 shows how the PC is loaded on
a write to PCL (PCLATH<4:0>
→
PCH). The lower
example in Figure 2-3 shows how the PC is loaded
during a
CALL
or
GOTO
instruction (PCLATH<4:3>
→
PCH).
2.3.1
MODIFYING PCL
Executing any instruction with the PCL register as the
destination simultaneously causes the Program
Counter PC<12:8> bits (PCH) to be replaced by the
contents of the PCLATH register. This allows the entire
contents of the program counter to be changed by first
writing the desired upper 5 bits to the PCLATH register.
When the lower 8 bits are then written to the PCL
register, all 13 bits of the program counter will change
to the values contained in the PCLATH register and
those being written to the PCL register.
A computed
GOTO
is accomplished by adding an offset
to the program counter (
ADDWF PCL
). Care should be
exercised when jumping into a look-up table or
program branch table (computed
GOTO
) by modifying
the PCL register. Assuming that PCLATH is set to the
table start address, if the table length is greater than
255 instructions, or if the lower 8 bits of the memory
address rolls over from 0xFF to 0x00 in the middle of
the table, then PCLATH must be incremented for each
address rollover that occurs between the table
beginning and the target location within the table.
For more information refer to Application Note
DS00556, “Implementing a Table Read”
2.3.2
PROGRAM MEMORY PAGING
The
CALL
and
GOTO
instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a
CALL
or
GOTO
instruction,
the upper bit of the address is provided by PCLATH<3>
(page select bit). When doing a
CALL
or
GOTO
instruc-
tion the user must ensure that the page select bit is pro-
grammed so that the desired destination program
memory page is addressed. When the
CALL
instruction
(or interrupt) is executed, the entire 13-bit PC return
address is pushed onto the stack. Therefore, manipu-
lation of the PCLATH<3> bit is not required for the
RETURN
or
RETFIE
instructions which pop the address
from the stack.
FIGURE 2-3:
LOADING OF PC IN
DIFFERENT SITUATIONS
2.3.3
STACK
The PIC16F785 family has an 8-level x 13-bit wide
hardware stack (see Figure 2-1). The stack space is
not part of either program or data space and the stack
pointer is not readable or writable. The PC is PUSHed
onto the stack when a
CALL
instruction is executed or
an interrupt causes a branch. The stack is POPed in
the event of a
RETURN,
instruction execution. PCLATH is not affected by a
PUSH or POP operation.
RETLW
or a
RETFIE
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
PUSH overwrites the value that was stored from the
first PUSH. The tenth PUSH overwrites the second
PUSH (and so on).
Note 1:
There are no Status bits to indicate stack
overflow or stack underflow conditions.
2:
There are no instructions/mnemonics
called pushor pop. These are actions that
occur from the execution of the
CALL,
RETURN, RETLW
and
RETFIE
instruc-
tions or the vectoring to an interrupt
address.
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
INSTRUCTION WITH
ALU RESULT
GOTO, CALL
OPCODE <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
8
7
2
PCLATH
PCH
PCL
PCL AS
DESTINATION
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相關代理商/技術參數(shù)
參數(shù)描述
PIC16F785-E/ML 功能描述:8位微控制器 -MCU 3.5 KB 128 RAM 18I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/P 功能描述:8位微控制器 -MCU 14KB 368 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/SO 功能描述:8位微控制器 -MCU 3.5KB FL 128R 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/SS 功能描述:8位微控制器 -MCU 3.5KB FL 128R 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-I/ML 功能描述:8位微控制器 -MCU 3.5 KB 128 RAM 18I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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