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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PIC16F874T-04/PT |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 27/218闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU FLASH 4KX14 EE 44TQFP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1,200 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 4MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯(c猫)/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 33 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 7KB锛�4K x 14锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 128 x 8 |
| RAM 瀹归噺锛� | 192 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 8x10b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 灏佽/澶栨锛� | 44-TQFP |
| 鍖呰锛� | 甯跺嵎 (TR) |
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PIC16F87X
DS30292C-page 120
2001 Microchip Technology Inc.
REGISTER 12-1:
CONFIGURATION WORD (ADDRESS 2007h)(1)
CP1
CP0
DEBUG
鈥�
WRT
CPD
LVP
BODEN
CP1
CP0
PWRTE
WDTE
F0SC1
F0SC0
bit13
bit0
bit 13-12,
bit 5-4
CP1:CP0: FLASH Program Memory Code Protection bits(2)
11
= Code protection off
10
= 1F00h to 1FFFh code protected (PIC16F877, 876)
10
= 0F00h to 0FFFh code protected (PIC16F874, 873)
01
= 1000h to 1FFFh code protected (PIC16F877, 876)
01
= 0800h to 0FFFh code protected (PIC16F874, 873)
00
= 0000h to 1FFFh code protected (PIC16F877, 876)
00
= 0000h to 0FFFh code protected (PIC16F874, 873)
bit 11
DEBUG: In-Circuit Debugger Mode
1
= In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins
0
= In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
bit 10
Unimplemented: Read as 鈥�1鈥�
bit 9
WRT: FLASH Program Memory Write Enable
1
= Unprotected program memory may be written to by EECON control
0
= Unprotected program memory may not be written to by EECON control
bit 8
CPD: Data EE Memory Code Protection
1
= Code protection off
0
= Data EEPROM memory code protected
bit 7
LVP: Low Voltage In-Circuit Serial Programming Enable bit
1
= RB3/PGM pin has PGM function, low voltage programming enabled
0
= RB3 is digital I/O, HV on MCLR must be used for programming
bit 6
BODEN: Brown-out Reset Enable bit(3)
1
= BOR enabled
0
= BOR disabled
bit 3
PWRTE: Power-up Timer Enable bit(3)
1
= PWRT disabled
0
= PWRT enabled
bit 2
WDTE: Watchdog Timer Enable bit
1
= WDT enabled
0
= WDT disabled
bit 1-0
FOSC1:FOSC0: Oscillator Selection bits
11
= RC oscillator
10
= HS oscillator
01
= XT oscillator
00
= LP oscillator
Note
1:
The erased (unprogrammed) value of the configuration word is 3FFFh.
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
3: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit PWRTE.
Ensure the Power-up Timer is enabled any time Brown-out Reset is enabled.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VI-B4W-IY-S | CONVERTER MOD DC/DC 5.5V 50W |
| PIC16F874T-04/L | IC MCU FLASH 4KX14 EE 44PLCC |
| PIC16F874T-04I/PT | IC MCU FLASH 4KX14 EE 44TQFP |
| VI-B4V-IY-S | CONVERTER MOD DC/DC 5.8V 50W |
| PIC16F871T-I/PT | IC MCU FLASH 2KX14 EE 44TQFP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F874T-10E/L | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 192 RAM 33 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F874T-10E/PQ | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 192 RAM 33 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F874T-10E/PT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 192 RAM 33 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F874T-20/L | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 192 RAM 33 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F874T-20/PQ | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 192 RAM 33 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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