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PIC16C5X
DS30453D-page 10
Preliminary
2002 Microchip Technology Inc.
FIGURE 3-1:
PIC16C5X SERIES BLOCK DIAGRAM
WDT TIME
OUT
8
STACK 1
STACK 2
EPROM/ROM
512 X 12 TO
2048 X 12
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
WATCHDOG
TIMER
CONFIGURATION WORD
OSCILLATOR/
TIMING &
CONTROL
GENERAL
PURPOSE
REGISTER
FILE
(SRAM)
24, 25, 72 or
73 Bytes
WDT/TMR0
PRESCALER
OPTION REG.
“OPTION”
“SLEEP”
“CODE
PROTECT”
“OSC
SELECT”
DIRECT ADDRESS
TMR0
FROM W
“TRIS 5”
“TRIS 6”
“TRIS 7”
FSR
TRISA
PORTA
TRISB
PORTC
TRISC
PORTB
FROM W
T0CKI
PIN
9-11
12
8
W
4
DATA BUS
8
ALU
STATUS
FROM W
CLKOUT
8
9
6
5
5-7
OSC1 OSC2 MCLR
LI
TER
A
LS
PC
“DISABLE”
2
RA<3:0>
RB<7:0>
RC<7:0>
(28-Pin
Devices Only)
DIRECT RAM
ADDRESS