參數(shù)資料
型號: PIC16LF720-I/ML
廠商: Microchip Technology
文件頁數(shù): 115/135頁
文件大小: 0K
描述: MCU PIC 2K FLASH 20-QFN
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 91
系列: PIC® XLP™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 17
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-VFQFN 裸露焊盤
包裝: 管件
PIC16(L)F720/721
DS41430C-page 80
Preliminary
2010-2011 Microchip Technology Inc.
9.2.4
ADC OPERATION DURING SLEEP
The ADC module can operate during Sleep. This
requires the ADC clock source to be set to the FRC
option. When the FRC clock source is selected, the
ADC waits one additional instruction before starting the
conversion. This allows the SLEEP instruction to be
executed, which can reduce system noise during the
conversion. If the ADC interrupt is enabled, the device
will wake-up from Sleep when the conversion
completes. If the ADC interrupt is disabled, the ADC
module is turned off after the conversion completes,
although the ADON bit remains set.
When the ADC clock source is something other than
FRC, a SLEEP instruction causes the present conver-
sion to be aborted and the ADC module is turned off,
although the ADON bit remains set.
9.2.5
SPECIAL EVENT TRIGGER
The Special Event Trigger of the CCP module allows
periodic ADC measurements without software inter-
vention. When this trigger occurs, the GO/DONE bit is
set by hardware and the Timer1 counter resets to zero.
Using the Special Event Trigger does not assure
proper ADC timing. It is the user’s responsibility to
ensure that the ADC timing requirements are met.
(CCP) Module” for more information.
9.2.6
A/D CONVERSION PROCEDURE
This is an example procedure for using the ADC to
perform an Analog-to-Digital conversion:
1.
Configure Port:
Disable pin output driver (Refer to the TRIS
register)
Configure pin as analog (Refer to the ANSEL
register)
2.
Configure the ADC module:
Select ADC conversion clock
Select ADC input channel
Turn on ADC module
3.
Configure ADC interrupt (optional):
Clear ADC interrupt flag
Enable ADC interrupt
Enable peripheral interrupt
Enable global interrupt(1)
4.
Wait the required acquisition time(2).
5.
Start conversion by setting the GO/DONE bit.
6.
Wait for ADC conversion to complete by one of
the following:
Polling the GO/DONE bit
Waiting for the ADC interrupt (interrupts
enabled)
7.
Read ADC Result.
8.
Clear the ADC interrupt flag (required if interrupt
is enabled).
EXAMPLE 9-1:
A/D CONVERSION
Note 1: The global interrupt can be disabled if the
user is attempting to wake-up from Sleep
and resume in-line code execution.
;This code block configures the ADC
;for polling, Vdd reference, Frc clock
;and AN0 input.
;
;Conversion start & polling for completion
; are included.
;
BANKSEL
ADCON1
;
MOVLW
B’01110000’ ;ADC Frc clock,
;VDD reference
MOVWF
ADCON1
;
BANKSEL
TRISA
;
BSF
TRISA,0
;Set RA0 to input
BANKSEL
ANSELA
;
BSF
ANSELA,0
;Set RA0 to analog
BANKSEL
ADCON0
;
MOVLW
B’00000001’;AN0, On
MOVWF
ADCON0
;
CALL
SampleTime ;Acquisiton delay
BSF
ADCON0,GO
;Start conversion
BTFSC
ADCON0,GO
;Is conversion done?
GOTO
$-1
;No, test again
BANKSEL
ADRES
;
MOVF
ADRES,W
;Read result
MOVWF
RESULT
;store in GPR space
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