參數(shù)資料
型號: PIC16LF720T-I/SS
廠商: Microchip Technology
文件頁數(shù): 82/135頁
文件大小: 0K
描述: MCU PIC 3.5KB FLASH 20SSOP
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® XLP™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 17
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
PIC16(L)F720/721
DS41430C-page 50
Preliminary
2010-2011 Microchip Technology Inc.
6.1.4
PIN DESCRIPTIONS AND
DIAGRAMS
Each PORTA pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the A/D Converter (ADC), refer to the
appropriate section in this data sheet.
6.1.4.1
RA0/AN0/ICSPDAT
Figure 6-1 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
an analog input for the ADC
ICSP programming data (separate controls from
TRISA)
ICD Debugging data (separate controls from
TRISA)
6.1.4.2
RA1/AN1/ICSPCLK
Figure 6-2 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
an analog input for the ADC
ICSP programming clock (separate controls from
TRISA)
ICD Debugging clock (separate controls from
TRISA)
6.1.4.3
RA2/AN2/T0CKI/INT
Figure 6-3 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
an analog input for the ADC
external interrupt
clock input for Timer0
The Timer0 clock input function works independently of
any TRIS register setting. Effectively, if TRISA2 = 0,
the PORTA2 register bit will output to the pad and Clock
Timer0 at the same time.
6.1.4.4
RA3/MCLR/VPP
Figure 6-4 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
Master Clear Reset with weak pull-up
6.1.4.5
RA4/AN3/T1G/CLKOUT
Figure 6-5 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
analog input for the ADC
Timer1 gate input
clock output
6.1.4.6
RA5/T1CKI/CLKIN
Figure 6-6 shows the diagram for this pin. This pin is
configurable to function as one of the following:
a general purpose I/O
Timer1 Clock input
clock input
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