參數(shù)資料
型號(hào): PIC16LF721-I/P
廠商: Microchip Technology
文件頁數(shù): 91/135頁
文件大?。?/td> 0K
描述: MCU PIC 4K FLASH 20-DIP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 22
系列: PIC® XLP™ 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 17
程序存儲(chǔ)器容量: 7KB(4K x 14)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
2010-2011 Microchip Technology Inc.
Preliminary
DS41430C-page 59
PIC16(L)F720/721
6.2.4
PIN DESCRIPTIONS AND
DIAGRAMS
Each PORTB pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the SSP, I2C or interrupts, refer to the
appropriate section in this data sheet.
6.2.4.1
RB4/AN10/SDI/SDA
Figure 6-7 shows the diagram for this pin. The RB4 pin
is configurable to function as one of the following:
General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
Analog input for the A/D
Synchronous Serial Port Input (SPI)
I2C data I/O
6.2.4.2
RB5/AN11/RX/DT
Figure 6-8 shows the diagram for this pin. The RB5 pin
is configurable to function as one of the following:
General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
Analog input for the A/D
USART asynchronous receive
USART synchronous receive
6.2.4.3
RB6/SCK/SCL
Figure 6-9 shows the diagram for this pin. The RB6 pin
is configurable to function as one of the following:
General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
Synchronous Serial Port clock for both SPI and
I2C
6.2.4.4
RB7/TX/CK
Figure 6-10 shows the diagram for this pin. The RB7
pin is configurable to function as one of the following:
General purpose I/O. Individually controlled
interrupt-on-change. Individually enabled pull-up.
USART asynchronous transmit
USART synchronous clock
FIGURE 6-7:
BLOCK DIAGRAM OF RB4
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUB
RD
WPUB
RD PORTB
RD
PORTB
WR
PORTB
WR
TRISB
RD
TRISB
WR
IOCB
RD
IOCB
Interrupt-on-
To SSP
Analog(1)
Input mode
RABPU
Analog(1)
Input mode
Change
Q3
To A/D Converter
ST
SSPEN
0
1
0
Note
1:
ANSEL determines Analog Input mode.
0
1
0
SSP
From
SSP
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