參數(shù)資料
型號： PIC16LF870-I/SO
廠商： Microchip Technology
文件頁數(shù)： 127/143頁
文件大?。?/td> 0K
描述： IC MCU FLASH 2KX14 EE A/D 28SOIC
產(chǎn)品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 27
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
連通性： UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 22
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 5x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
產(chǎn)品目錄頁面： 639 (CN2011-ZH PDF)
PIC16F870/871
DS30569B-page 82
2003 Microchip Technology Inc.
10.1
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 10-2. The
source impedance (RS) and the internal sampling
switch (RSS) impedance directly affect the time
required to charge the capacitor CHOLD. The sampling
switch (RSS) impedance varies over the device voltage
(VDD), see Figure 10-2. The maximum recom-
mended impedance for analog sources is 10 k
. As
the impedance is decreased, the acquisition time may
be decreased. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To
calculate
the
minimum
acquisition
time,
Equation 10-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, TACQ, see
the PICmicro Mid-Range MCU Family Reference
Manual (DS33023).
EQUATION 10-1:
ACQUISITION TIME
FIGURE 10-2:
ANALOG INPUT MODEL
TACQ
TC
TACQ
=
Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
TAMP + TC + TCOFF
2
s + TC + [(Temperature – 25°C)(0.05 s/°C)]
CHOLD (RIC + RSS + RS) In(1/2047)
- 120 pF (1 k
+ 7 k + 10 k) In(0.0004885)
16.47
s
2
s + 16.47 s + [(50°C – 25°C)(0.05 s/°C)
19.72
s
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (CHOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 k
. This is required to meet the pin
leakage specification.
4: After a conversion has completed, a 2.0 TAD delay must complete before acquisition can begin again.
During this time, the holding capacitor is not connected to the selected A/D input channel.
CPIN
VA
RS
ANx
5 pF
VDD
VT = 0.6V
I LEAKAGE
RIC
≤ 1k
Sampling
Switch
SS RSS
CHOLD
= DAC capacitance
VSS
6V
Sampling Switch
5V
4V
3V
2V
567 8 9 10 11
(k
)
VDD
= 120 pF
± 500 nA
Legend
CPIN
VT
I LEAKAGE
RIC
SS
CHOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
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相關代理商/技術參數(shù)
參數(shù)描述
PIC16LF870ISP 制造商:Microchip Technology Inc 功能描述:
PIC16LF870T-I/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LF870T-I/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LF871-I/L 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16LF871-I/L 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU 16LF871 PLCC44
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