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PIC17C4X
DS30412C-page 186
1996 Microchip Technology Inc.
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, AND POWER-UP
TIMER TIMING
TABLE 19-4:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
30
TmcL
MCLR Pulse Width (low)
100 *
—
ns
VDD = 5V
31
Twdt
Watchdog Timer Time-out Period
(Prescale = 1)
5 *
12
25 *
ms
VDD = 5V
32
Tost
Oscillation Start-up Timer Period
—
1024TOSC§
—
ms
TOSC = OSC1 period
33
Tpwrt
Power-up Timer Period
40 *
96
200 *
ms
VDD = 5V
35
TmcL2adI MCLR to System Inter-
face bus (AD15:AD0>)
invalid
PIC17CR42/42A/
43/R43/44
—
100 *
ns
PIC17LCR42/
42A/43/R43/44
—
120 *
ns
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
These parameters are for design guidance only and are not tested, nor characterized.
§
This specication ensured by design.
VDD
MCLR
Internal
POR
PWRT
Timeout
OSC
Timeout
Internal
RESET
Watchdog
Timer
RESET
33
32
30
31
Address /
Data
35