參數(shù)資料
型號： PIC17C756A-33/L
廠商： Microchip Technology
文件頁數(shù)： 111/159頁
文件大?。?/td> 0K
描述： IC MCU OTP 16KX16 A/D PWM 68PLCC
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 19
系列： PIC® 17C
核心處理器： PIC
芯體尺寸： 8-位
速度： 33MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 50
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： OTP
RAM 容量： 902 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x10b
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 68-LCC（J 形引線）
包裝： 管件
配用： AC164308-ND - MODULE SKT FOR PM3 68PLCC
DVA17XL681-ND - DEVICE ADAPTER FOR PIC17C752
DM173001-ND - KIT DEVELOPMENT PICDEM17
AC174007-ND - MODULE SKT PROMATEII 68PLCC
AC164024-ND - ADAPTER PICSTART PLUS 68PLCC
PIC17C7XX
DS30289B-page 54
2000 Microchip Technology Inc.
7.3
Stack Operation
PIC17C7XX devices have a 16 x 16-bit hardware stack
(Figure 7-1). The stack is not part of either the program
or data memory space, and the stack pointer is neither
readable nor writable. The PC (Program Counter) is
“PUSH’d” onto the stack when a CALL or LCALL
instruction is executed, or an interrupt is acknowl-
edged. The stack is “POP’d” in the event of a RETURN,
RETLW
, or a RETFIE instruction execution. PCLATH is
not affected by a “PUSH” or a “POP” operation.
The stack operates as a circular buffer, with the stack
pointer initialized to '0' after all RESETS. There is a
stack available bit (STKAV) to allow software to ensure
that the stack will not overflow. The STKAV bit is set
after a device RESET. When the stack pointer equals
Fh, STKAV is cleared. When the stack pointer rolls over
from Fh to 0h, the STKAV bit will be held clear until a
device RESET.
After the device is “PUSH’d” sixteen times (without a
“POP”), the seventeenth push overwrites the value
from the first push. The eighteenth push overwrites the
second push (and so on).
7.4
Indirect Addressing
Indirect addressing is a mode of addressing data mem-
ory where the data memory address in the instruction
is not fixed. That is, the register that is to be read or
written can be modified by the program. This can be
useful for data tables in the data memory. Figure 7-6
shows the operation of indirect addressing. This
depicts the moving of the value to the data memory
address specified by the value of the FSR register.
Example 7-1 shows the use of indirect addressing to
clear RAM in a minimum number of instructions. A sim-
ilar concept could be used to move a defined number
of bytes (block) of data to the USART transmit register
(TXREG). The starting address of the block of data to
be transmitted could easily be modified by the program.
FIGURE 7-6:
INDIRECT ADDRESSING
7.4.1
INDIRECT ADDRESSING
REGISTERS
The PIC17C7XX has four registers for indirect address-
ing. These registers are:
INDF0 and FSR0
INDF1 and FSR1
Registers INDF0 and INDF1 are not physically imple-
mented. Reading or writing to these registers activates
indirect addressing, with the value in the corresponding
FSR register being the address of the data. The FSR is
an 8-bit register and allows addressing anywhere in the
256-byte data memory address range. For banked
memory, the bank of memory accessed is specified by
the value in the BSR.
If file INDF0 (or INDF1) itself is read indirectly via an
FSR, all '0's are read (Zero bit is set). Similarly, if INDF0
(or INDF1) is written to indirectly, the operation will be
equivalent to a NOP, and the status bits are not affected.
Note 1: There is not a status bit for stack under-
flow. The STKAV bit can be used to detect
the underflow which results in the stack
pointer being at the Top-of-Stack.
2: There are no instruction mnemonics
called PUSH or POP. These are actions
that occur from the execution of the CALL,
RETURN
, RETLW and RETFIE instruc-
tions, or the vectoring to an interrupt
vector.
3: After a RESET, if a “POP” operation
occurs before a “PUSH” operation, the
STKAV bit will be cleared. This will
appear as if the stack is full (underflow
has occurred). If a “PUSH” operation
occurs next (before another “POP”), the
STKAV bit will be locked clear. Only a
device RESET will cause this bit to set.
Opcode
Address
File = INDFx
FSR
Instruction
Executed
Instruction
Fetched
RAM
Opcode
File
8
相關(guān)PDF資料
PDF描述
PIC18F8722-I/PT IC PIC MCU FLASH 64KX16 80TQFP
85382-011 BP PIERCE BLOCK 0.85
DSPIC30F6011A-30I/PF IC DSPIC MCU/DSP 132K 64TQFP
PIC17C44-16/L IC MCU OTP 8KX16 PWM 44PLCC
85814-102LF 102LF METRAL 5R HDR HALF KEY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC17C756AT-16/L 功能描述:8位微控制器 -MCU 32KB 902 RAM 50 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17C756AT-16/PT 功能描述:8位微控制器 -MCU 32KB 902 RAM 50 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17C756AT-16E/L 功能描述:8位微控制器 -MCU 32KB 902 RAM 50 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17C756AT-16E/PT 功能描述:8位微控制器 -MCU 32KB 902 RAM 50 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC17C756AT-16I/L 功能描述:8位微控制器 -MCU 32KB 902 RAM 50 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*