參數(shù)資料
型號(hào): PIC18F252-I/SP
廠商: Microchip Technology
文件頁數(shù): 48/134頁
文件大?。?/td> 0K
描述: IC MCU FLASH 16KX16 EE 28DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 15
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 256 x 8
RAM 容量: 1.5K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: PIC18F252-I/SPG
PIC18F252-I/SPG-ND
PIC18F252I/SP
2011 Microchip Technology Inc.
Preliminary
DS41609A-page 235
PIC16(L)F1508/9
REGISTER 21-5:
SSPXMSK: SSP MASK REGISTER
R/W-1/1
MSK<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-1
MSK<7:1>:
Mask bits
1 = The received address bit n is compared to SSPxADD<n> to detect I2C address match
0 = The received address bit n is not used to detect I2C address match
bit 0
MSK<0>:
Mask bit for I2C Slave mode, 10-bit Address
I2C Slave mode, 10-bit address (SSPM<3:0> = 0111 or 1111):
1 = The received address bit 0 is compared to SSPxADD<0> to detect I2C address match
0 = The received address bit 0 is not used to detect I2C address match
I2C Slave mode, 7-bit address, the bit is ignored
REGISTER 21-6:
SSPXADD: MSSP ADDRESS AND BAUD RATE REGISTER (I2C MODE)
R/W-0/0
ADD<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
Master mode:
bit 7-0
ADD<7:0>:
Baud Rate Clock Divider bits
SCLx pin clock period = ((ADD<7:0> + 1) *4)/FOSC
10-Bit Slave mode — Most Significant Address Byte:
bit 7-3
Not used:
Unused for Most Significant Address Byte. Bit state of this register is a “don’t care”. Bit pat-
tern sent by master is fixed by I2C specification and must be equal to ‘11110’. However, those bits are
compared by hardware and are not affected by the value in this register.
bit 2-1
ADD<2:1>:
Two Most Significant bits of 10-bit address
bit 0
Not used:
Unused in this mode. Bit state is a “don’t care”.
10-Bit Slave mode — Least Significant Address Byte:
bit 7-0
ADD<7:0>:
Eight Least Significant bits of 10-bit address
7-Bit Slave mode:
bit 7-1
ADD<7:1>:
7-bit address
bit 0
Not used:
Unused in this mode. Bit state is a “don’t care”.
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