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參數(shù)資料
| 型號(hào)： | PIC18F2580-I/ML |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 40/88頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 16KX16 28QFN |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus PIC18 J Series MCU Overview 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 61 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，HLVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 25 |
| 程序存儲(chǔ)器容量： | 32KB（16K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 256 x 8 |
| RAM 容量： | 1.5K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-VQFN 裸露焊盤(pán) |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 645 (CN2011-ZH PDF) |
| 配用： | AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN |
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2010 Microchip Technology Inc.
DS21801F-page 45
MCP2515
6.0
ERROR DETECTION
The
CAN
protocol
provides
sophisticated
error
detection mechanisms. The following errors can be
detected.
6.1
CRC Error
With the Cyclic Redundancy Check (CRC), the
transmitter calculates special check bits for the bit
sequence from the start of a frame until the end of the
data field. This CRC sequence is transmitted in the
CRC Field. The receiving node also calculates the
CRC sequence using the same formula and performs
a comparison to the received sequence. If a mismatch
is detected, a CRC error has occurred and an error
frame is generated. The message is repeated.
6.2
Acknowledge Error
In the acknowledge field of a message, the transmitter
checks if the acknowledge slot (which has been sent
out as a recessive bit) contains a dominant bit. If not, no
other node has received the frame correctly. An
acknowledge error has occurred, an error frame is
generated and the message will have to be repeated.
6.3
Form Error
If a node detects a dominant bit in one of the four
segments (including end-of-frame, interframe space,
acknowledge delimiter or CRC delimiter), a form error
has occurred and an error frame is generated. The
message is repeated.
6.4
Bit Error
A bit error occurs if a transmitter detects the opposite
bit level to what it transmitted (i.e., transmitted a
dominant and detected a recessive, or transmitted a
recessive and detected a dominant).
Exception: In the case where the transmitter sends a
recessive bit and a dominant bit is detected during the
arbitration field and the acknowledge slot, no bit error is
generated because normal arbitration is occurring.
6.5
Stuff Error
lf, between the start-of-frame and the CRC delimiter,
six consecutive bits with the same polarity are
detected, the bit-stuffing rule has been violated. A stuff
error occurs and an error frame is generated. The
message is repeated.
6.6
Error States
Detected errors are made known to all other nodes via
error frames. The transmission of the erroneous mes-
sage is aborted and the frame is repeated as soon as
possible. Furthermore, each CAN node is in one of the
three error states according to the value of the internal
error counters:
1.
Error-active
2.
Error-passive
3.
Bus-off (transmitter only)
The error-active state is the usual state where the node
can transmit messages and active error frames (made
of dominant bits) without any restrictions.
In the error-passive state, messages and passive error
frames (made of recessive bits) may be transmitted.
The bus-off state makes it temporarily impossible for
the station to participate in the bus communication.
During this state, messages can neither be received or
transmitted. Only transmitters can go bus-off.
6.7
Error Modes and Error Counters
The MCP2515 contains two error counters: the
Receive Error Counter (REC) (see Register 6-2) and
the Transmit Error Counter (TEC) (see Register 6-1).
The values of both counters can be read by the MCU.
These counters are incremented/decremented in
accordance with the CAN bus specification.
The MCP2515 is error-active if both error counters are
below the error-passive limit of 128.
It is error-passive if at least one of the error counters
equals or exceeds 128.
It goes to bus-off if the TEC exceeds the bus-off limit of
255. The device remains in this state until the bus-off
recovery sequence is received. The bus-off recovery
sequence consists of 128 occurrences and 11 consec-
utive recessive bits (see Figure 6-1).
The Current Error mode of the MCP2515 can be read
by the MCU via the EFLG register (see Register 6-3).
Additionally, there is an error state warning flag bit
(EFLG:EWARN) which is set if at least one of the error
counters equals or exceeds the error warning limit of
96. EWARN is reset if both error counters are less than
the error warning limit.
Note:
The MCP2515, after going bus-off, will
recover back to error-active without any
intervention by the MCU if the bus remains
idle for 128 x 11 bit times. If this is not
desired, the error interrupt service routine
should address this.
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| PIC18F2580T-I/ML | 功能描述:8位微控制器 -MCU 32 KB FL 1536 RAM 25 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| PIC18F2585-E/SP | 功能描述:8位微控制器 -MCU 48KB 3328 RAM w/ECAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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