參數(shù)資料
型號(hào): PIC18F4553-I/PT
廠商: Microchip Technology
文件頁(yè)數(shù): 19/46頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 16KX16 44TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 160
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 646 (CN2011-ZH PDF)
配用: DM163025-ND - PIC DEM FULL SPEED USB DEMO BRD
AC164305-ND - MODULE SKT FOR PM3 44TQFP
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
AC164020-ND - MODULE SKT PROMATEII 44TQFP
PIC18F2458/2553/4458/4553
DS39887C-page 26
2009 Microchip Technology Inc.
2.1
A/D Acquisition Requirements
For the A/D Converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 2-3. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS)
impedance varies over the device voltage (VDD). The
source impedance affects the offset voltage at the ana-
log input (due to pin leakage current). The maximum
recommended impedance for analog sources is
2.5 k
Ω. After the analog input channel is selected
(changed), the channel must be sampled for at least
the minimum acquisition time before starting a
conversion.
To calculate the minimum acquisition time, Equation 2-1
may be used. This equation assumes that 1/2 LSb error
is used (4096 steps for the 12-bit A/D). The 1/2 LSb error
is the maximum error allowed for the A/D to meet its
specified resolution.
Example 2-3 shows the calculation of the minimum
required acquisition time, TACQ. This calculation is
based
on
the
following
application
system
assumptions:
CHOLD
=
25 pF
Rs
=
2.5 k
Ω
Conversion Error
1/2 LSb
VDD
=3V
→ Rss = 4 kΩ
Temperature
=
85
°C (system max.)
EQUATION 2-1:
ACQUISITION TIME
EQUATION 2-2:
A/D MINIMUM CHARGING TIME
EQUATION 2-3:
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
Note:
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
TACQ
=
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
=TAMP + TC + TCOFF
VHOLD
=
(VREF – (VREF/4096)) (1 – e(-TC/CHOLD(RIC + RSS + RS)))
or
TC
=
-(CHOLD)(RIC + RSS + RS) ln(1/4096)
TACQ
=TAMP + TC + TCOFF
TAMP
=0.2 s
TCOFF
=
(Temp – 25
°C)(0.02 s/°C)
(85
°C – 25°C)(0.02 s/°C)
1.2 s
Temperature coefficient is only required for temperatures > 25
°C. Below 25°C, TCOFF = 0 s.
TC
=
-(CHOLD)(RIC + RSS + RS) ln(1/4096) s
-(25 pF) (1 k
Ω + 4 kΩ + 2.5 kΩ) ln(0.0002441) s
1.56 s
TACQ
=
0.2 s + 1.56
μs + 1.2 s
2.96 s
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