參數(shù)資料
型號: PIC18F45J11-I/PT
廠商: Microchip Technology
文件頁數(shù): 15/228頁
文件大小: 0K
描述: IC PIC MCU FLASH 32KB 44-TQFP
產(chǎn)品培訓模塊: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標準包裝: 160
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2.15 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 13x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 657 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
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2010 Microchip Technology Inc.
DS70138G-page 111
dsPIC30F3014/4013
17.0
CAN MODULE
17.1
Overview
The Controller Area Network (CAN) module is a serial
interface, useful for communicating with other CAN
modules or microcontroller devices. This interface/
protocol was designed to allow communications within
noisy environments.
The CAN module is a communication controller imple-
menting the CAN 2.0 A/B protocol, as defined in the
BOSCH specification. The module supports CAN 1.2,
CAN 2.0A, CAN 2.0B Passive, and CAN 2.0B Active
versions of the protocol. The module implementation is
a full CAN system. The CAN specification is not cov-
ered within this data sheet. The reader may refer to the
BOSCH CAN specification for further details.
The module features are as follows:
Implementation of the CAN protocol CAN 1.2,
CAN 2.0A and CAN 2.0B
Standard and extended data frames
0-8 bytes data length
Programmable bit rate up to 1 Mbit/sec
Support for remote frames
Double-buffered receiver with two prioritized
received message storage buffers (each buffer
may contain up to 8 bytes of data)
6 full (standard/extended identifier), acceptance
filters, 2 associated with the high-priority receive
buffer and 4 associated with the low-priority
receive buffer
2 full, acceptance filter masks, one each
associated with the high and low-priority receive
buffers
Three transmit buffers with application specified
prioritization and abort capability (each buffer may
contain up to 8 bytes of data)
Programmable wake-up functionality with
integrated low-pass filter
Programmable Loopback mode supports self-test
operation
Signaling via interrupt capabilities for all CAN
receiver and transmitter error states
Programmable clock source
Programmable link to input capture module (IC2,
for both CAN1 and CAN2) for time-stamping and
network synchronization
Low-power Sleep and Idle mode
The CAN bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.
17.2
Frame Types
The CAN module transmits various types of frames
which include data messages or remote transmission
requests, initiated by the user, as other frames that are
automatically generated for control purposes. The
following frame types are supported:
Standard Data Frame:
A standard data frame is generated by a node
when the node wishes to transmit data. It includes
an 11-bit Standard Identifier (SID) but not an 18-bit
Extended Identifier (EID).
Extended Data Frame:
An extended data frame is similar to a standard
data frame but includes an extended identifier as
well.
Remote Frame:
It is possible for a destination node to request the
data from the source. For this purpose, the
destination node sends a remote frame with an
identifier that matches the identifier of the required
data frame. The appropriate data source node
then sends a data frame as a response to this
remote request.
Error Frame:
An error frame is generated by any node that
detects a bus error. An error frame consists of
2 fields: an error flag field and an error delimiter
field.
Overload Frame:
An overload frame can be generated by a node as
a result of 2 conditions. First, the node detects a
dominant bit during interframe space which is an
illegal condition. Second, due to internal condi-
tions, the node is not yet able to start reception of
the next message. A node may generate a
maximum of 2 sequential overload frames to
delay the start of the next message.
Interframe Space:
Interframe space separates a proceeding frame
(of whatever type) from a following data or remote
frame.
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
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