[ label ] MOVIW ++FSRn [ la" />
參數(shù)資料
型號: PIC18LF2420-I/SP
廠商: Microchip Technology
文件頁數(shù): 91/151頁
文件大小: 0K
描述: IC MCU FLASH 8KX16 28-DIP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 15
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 25
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁面: 642 (CN2011-ZH PDF)
PIC16(L)F1782/3
DS41579C-page 358
Preliminary
2011-2012 Microchip Technology Inc.
MOVIW
Move INDFn to W
Syntax:
[ label ] MOVIW ++FSRn
[ label ] MOVIW --FSRn
[ label ] MOVIW FSRn++
[ label ] MOVIW FSRn--
[ label ] MOVIW k[FSRn]
Operands:
n
[0,1]
mm
[00,01, 10, 11]
-32
k 31
Operation:
INDFn
W
Effective address is determined by
FSR + 1 (preincrement)
FSR - 1 (predecrement)
FSR + k (relative offset)
After the Move, the FSR value will be
either:
FSR + 1 (all increments)
FSR - 1 (all decrements)
Unchanged
Status Affected:
Z
Mode
Syntax
mm
Preincrement
++FSRn
00
Predecrement
--FSRn
01
Postincrement
FSRn++
10
Postdecrement
FSRn--
11
Description:
This instruction is used to move data
between W and one of the indirect
registers (INDFn). Before/after this
move, the pointer (FSRn) is updated by
pre/post incrementing/decrementing it.
Note: The INDFn registers are not
physical registers. Any instruction that
accesses an INDFn register actually
accesses the register at the address
specified by the FSRn.
FSRn is limited to the range 0000h -
FFFFh. Incrementing/decrementing it
beyond these bounds will cause it to
wrap-around.
MOVLB
Move literal to BSR
Syntax:
[ label ] MOVLB k
Operands:
0
k 15
Operation:
k
BSR
Status Affected:
None
Description:
The five-bit literal ‘k’ is loaded into the
Bank Select Register (BSR).
MOVLP
Move literal to PCLATH
Syntax:
[ label ] MOVLP k
Operands:
0
k 127
Operation:
k
PCLATH
Status Affected:
None
Description:
The seven-bit literal ‘k’ is loaded into the
PCLATH register.
MOVLW
Move literal to W
Syntax:
[ label ]
MOVLW k
Operands:
0
k 255
Operation:
k
(W)
Status Affected:
None
Description:
The eight-bit literal ‘k’ is loaded into W
register. The “don’t cares” will assem-
ble as ‘0’s.
Words:
1
Cycles:
1
Example:
MOVLW
0x5A
After Instruction
W
=
0x5A
MOVWF
Move W to f
Syntax:
[ label ]
MOVWF
f
Operands:
0
f 127
Operation:
(W)
(f)
Status Affected:
None
Description:
Move data from W register to register
‘f’.
Words:
1
Cycles:
1
Example:
MOVWF
OPTION_REG
Before Instruction
OPTION_REG = 0xFF
W = 0x4F
After Instruction
OPTION_REG = 0x4F
W = 0x4F
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