參數(shù)資料
型號： PIC18LF2480-I/ML
廠商： Microchip Technology
文件頁數(shù)： 27/88頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 8KX16 28QFN
產(chǎn)品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 61
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 40MHz
連通性： CAN，I²C，SPI，UART/USART
外圍設備： 欠壓檢測/復位，HLVD，POR，PWM，WDT
輸入/輸出數(shù)： 25
程序存儲器容量： 16KB（8K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 768 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-VQFN 裸露焊盤
包裝： 管件
產(chǎn)品目錄頁面： 645 (CN2011-ZH PDF)
2010 Microchip Technology Inc.
DS21801F-page 33
MCP2515
4.5.3
FILHIT BITS
Filter
matches
on
received
messages
can
be
determined by the FILHIT bits in the associated
RXBnCTRL register. RXB0CTRL.FILHIT0 for buffer 0
and RXB1CTRL.FILHIT<2:0> for buffer 1.
The three FILHIT bits for receive buffer 1 (RXB1) are
coded as follows:
- 101 = Acceptance Filter 5 (RXF5)
- 100 = Acceptance Filter 4 (RXF4)
- 011 = Acceptance Filter 3 (RXF3)
- 010 = Acceptance Filter 2 (RXF2)
- 001 = Acceptance Filter 1 (RXF1)
- 000 = Acceptance Filter 0 (RXF0)
RXB0CTRL contains two copies of the BUKT bit and
the FILHIT<0> bit.
The coding of the BUKT bit enables these three bits to
be used similarly to the RXB1CTRL.FILHIT bits and to
distinguish a hit on filter RXF0 and RXF1 in either
RXB0 or after a roll over into RXB1.
- 111 = Acceptance Filter 1 (RXB1)
- 110 = Acceptance Filter 0 (RXB1)
- 001 = Acceptance Filter 1 (RXB0)
- 000 = Acceptance Filter 0 (RXB0)
If the BUKT bit is clear, there are six codes
corresponding to the six filters. If the BUKT bit is set,
there are six codes corresponding to the six filters, plus
two additional codes corresponding to RXF0 and RXF1
filters that roll over into RXB1.
4.5.4
MULTIPLE FILTER MATCHES
If more than one acceptance filter matches, the FILHIT
bits will encode the binary value of the lowest
numbered filter that matched. For example, if filter
RXF2 and filter RXF4 match, FILHIT will be loaded with
the value for RXF2. This essentially prioritizes the
acceptance filters with a lower-numbered filter having
higher priority. Messages are compared to filters in
ascending order of filter number. This also ensures that
the message will only be received into one buffer. This
implies that RXB0 has a higher priority than RXB1.
4.5.5
CONFIGURING THE MASKS AND
FILTERS
The mask and filter registers can only be modified
when the MCP2515 is in Configuration mode (see
FIGURE 4-5:
MESSAGE ACCEPTANCE MASK AND FILTER OPERATION
Note:
000
and 001 can only occur if the BUKT bit
in RXB0CTRL is set, allowing RXB0
messages to roll over into RXB1.
Note:
The mask and filter registers read all '0'
when in any mode except Configuration
mode.
Acceptance Filter Register
Acceptance Mask Register
RxRqst
Message Assembly Buffer
RXFn0
RXFn1
RXFnn
RXMn0
RXMn1
RXMnn
Identifier
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