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PIC18F85J11 FAMILY
DS39774D-page 200
2010 Microchip Technology Inc.
FIGURE 17-12:
I2C SLAVE MODE TIMING WITH SEN = 0 AND ADMSK<5:1> = 01001
(RECEPTION, 10-BIT ADDRESSING)
SDA
SCL
S
P
IF
(P
IR1<
3>
)
BF
(
S
PST
A
T
<
0>
)
S
1
2
3
4
56
7
8
9
1
2
3
4
5
6
7
89
1
2
3
4
5
7
8
9
P
1
0
A
9
A
8
A
7
A
6
A
5
X
A3
A
2
X
D
7
D6
D
5
D4
D3
D1
D0
Re
ce
iv
e
Da
ta
Byte
ACK
R/W
=
0
ACK
Re
ceive
F
irs
tB
yte
of
A
d
dr
ess
C
le
a
re
din
so
ftwa
re
D2
6
Cle
a
re
d
in
so
ftw
ar
e
R
e
ce
iv
e
S
e
cond
B
yte
of
A
ddre
ss
C
lea
re
db
yh
a
rd
w
a
re
w
hen
S
P
A
D
is
updat
ed
w
ith
low
byte
of
add
ress
UA
(
SSP
ST
A
T
<1
>)
Clo
ck
is
h
e
ld
lo
w
u
n
til
upda
te
of
S
P
A
D
has
ta
ken
pl
ac
e
UA
is
set
indicat
in
g
tha
t
the
S
P
A
D
need
sto
be
upda
ted
U
A
is
set
indi
cati
ng
that
SSP
ADD
n
e
ds
t
o
b
e
update
d
Cle
a
re
db
yh
a
rd
wa
re
wh
e
n
SSP
ADD
is
u
p
d
ate
d
with
h
ig
h
by
te
of
addr
ess
S
SPB
UF
is
wr
itte
nwith
conten
ts
of
S
P
S
R
D
u
mmy
read
of
S
P
B
U
F
to
clear
B
F
flag
AC
K
CKP
(
S
P
CON1
<4
>)
12
3
4
5
7
8
9
D7
D6
D5
D4
D3
D1
D0
Re
ce
ive
Da
ta
B
yt
e
B
us
m
a
st
er
term
inate
s
tran
sfer
D2
6
ACK
Cle
a
re
d
in
so
ftwa
re
Cle
a
re
d
in
so
ftwa
re
SSP
O
V
(
S
SPCO
N
1
<
6
>
)
S
SPO
V
is
se
t
because
S
P
B
U
F
is
still
fu
ll.
AC
K
is
no
tsent.
(C
K
P
do
es
not
reset
to
‘0
’wh
e
nS
E
N
=
0
)
Clo
ck
is
h
e
ld
lo
w
u
n
til
upda
te
of
S
P
A
D
has
ta
ken
p
lace
No
te
1
:
x
=
Don
’tcar
e(
i.e.,
ad
dre
ss
b
itcan
be
eith
er
a
‘1
’or
a
‘0
’).
2:
In
th
is
e
xa
m
p
le
,
an
a
dd
re
ss
e
q
ua
lt
oA9
.A
8
.A7
.A6
.A5
.X
.A3
.A2
.X.X
will
b
eAckn
owle
d
ge
da
nd
ca
us
ea
n
in
te
rr
up
t.
3:
N
ote
tha
tth
eM
ost
S
ig
nifica
nt
b
its
o
fth
ea
ddr
ess
are
no
ta
ffect
ed
by
th
eb
itm
asking
.