參數(shù)資料
型號: PIC18LF4331-I/PT
廠商: Microchip Technology
文件頁數(shù): 80/119頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 4KX16 44TQFP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 160
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,LVD,電源控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 8KB(4K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 9x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 645 (CN2011-ZH PDF)
其它名稱: PIC18LF4331-I/PTR
PIC18LF4331-I/PTR-ND
2010 Microchip Technology Inc.
DS39616D-page 63
PIC18F2331/2431/4331/4431
When the stack has been popped enough times to
unload the stack, the next pop will return a value of zero
to the PC and set the STKUNF bit, while the Stack
Pointer remains at zero. The STKUNF bit will remain
set until cleared by software or a POR occurs.
FIGURE 6-3:
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
Note:
Returning a value of zero to the PC on an
underflow has the effect of vectoring the
program to the Reset vector, where the
stack conditions can be verified and
appropriate actions can be taken. This is
not the same as a Reset as the contents
of the SFRs are not affected.
REGISTER 6-1:
STKPTR: STACK POINTER REGISTER
R/C-0
U-0
R/W-0
STKFUL(1)
STKUNF(1)
SP4
SP3
SP2
SP1
SP0
bit 7
bit 0
Legend:
C = Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
STKFUL:
Stack Full Flag bit(1)
1
= Stack became full or overflowed
0
= Stack has not become full or overflowed
bit 6
STKUNF:
Stack Underflow Flag bit(1)
1
= Stack underflow occurred
0
= Stack underflow did not occur
bit 5
Unimplemented:
Read as ‘0’
bit 4-0
SP<4:0>:
Stack Pointer Location bits
Note 1:
Bit 7 and bit 6 are cleared by user software or by a POR.
00011
001A34h
11111
11110
11101
00010
00001
00000
00010
Return Address Stack
Top-of-Stack
000D58h
TOSL
TOSH
TOSU
34h
1Ah
00h
STKPTR<4:0>
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