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參數(shù)資料
| 型號： | PIC18LF6722T-I/PT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 64KX16 64TQFP |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 1,200 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設備： | 欠壓檢測/復位，HLVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 54 |
| 程序存儲器容量： | 128KB（64K x 16） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 1K x 8 |
| RAM 容量： | 3.8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 12x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 64-TQFP |
| 包裝： | 帶卷 (TR) |
2006 Microchip Technology Inc.
DS80221C-page 3
PIC18F6627/6722/8627/8722
7.
Module: Interrupts
If an interrupt occurs during a two-cycle instruction
that modifies the STATUS, BSR or WREG register,
the unmodified value of the register will be saved
to the corresponding Fast Return (Shadow)
register and upon a fast return from the interrupt,
the unmodified value will be restored to the
STATUS, BSR or WREG register.
For example, if a high priority interrupt occurs
during the instruction, MOVFF TEMP, WREG, the
MOVFF
instruction will be completed and WREG
will be loaded with the value of TEMP before
branching to ISR. However, the previous value of
WREG will be saved to the Fast Return register
during ISR branching. Upon return from the
interrupt with a fast return, the previous value of
WREG in the Fast Return register will be written to
WREG. This results in WREG containing the value
it had before execution of MOVFF TEMP, WREG.
Affected instructions are:
MOVFF
Fs, Fd
where Fd is WREG, BSR or STATUS;
MOVSF
Zs, Fd
where Fd is WREG, BSR or STATUS; and
MOVSS
[Zs], [Zd]
where the destination is WREG, BSR or STATUS.
Work around
1. Assembly Language Programming:
If any two-cycle instruction is used to modify
the WREG, BSR or STATUS register, do not
use the RETFIE FAST instruction to return
from the interrupt. Instead, save and then
restore WREG, BSR and STATUS via software
as shown in Example 8-1 in the Device Data
Sheet.
Alternatively, in the case of MOVFF, use the
MOVF
instruction to write to WREG instead. For
example, use:
MOVF
TEMP, W
MOVWF
BSR
instead of MOVFF TEMP, BSR.
As another alternative, the following work
around shown in Example 1 can be used. This
example overwrites the Fast Return register by
making a dummy call to Foo with the fast
option in the high priority service routine.
2. C Language Programming:
The exact work around depends on the com-
piler in use. Please refer to your C compiler
documentation for details.
If using the Microchip MPLAB C18 C Compiler,
define both high and low priority interrupt han-
dler functions as “l(fā)ow priority” by using the
pragma interruptlow
directive.
This
directive instructs the compiler to not use the
RETFIE
FAST
instruction. If the proper high
priority interrupt bit is set in the IPRx register,
then the interrupt is treated as high priority in
spite of the pragma interruptlow directive.
The code segment shown in Example 2
demonstrates the work around using the C18
compiler. An optimized C18 version, which
illustrates how to reduce the instruction cycle
count to 3, is provided in Example 3.
Date Codes that pertain to this issue:
All engineering and production devices.
EXAMPLE 1:
ASSEMBLY LANGUAGE INTERRUPT SERVICE
ISR @ 0x0008
CALL
Foo, FAST
; store current value of WREG, BSR, STATUS for a second time
Foo:
POP
; clears return address of Foo call
:
; insert high priority ISR code here
:
RETFIE
FAST
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