參數(shù)資料
型號: PIC24FJ128GA110-I/PT
廠商: Microchip Technology
文件頁數(shù): 3/18頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 100TQFP
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 119
系列: PIC® 24F
核心處理器: PIC
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲(chǔ)器容量: 128KB(43K x 24)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 648 (CN2011-ZH PDF)
配用: 876-1004-ND - PIC24 BREAKOUT BOARD
MA240015-ND - BOARD MCV PIM FOR 24F256GA
DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
2008-2011 Microchip Technology Inc.
DS80368L-page 11
PIC24FJ256GA110 FAMILY
31. Module: Output Compare (Interrupt)
Under certain circumstances, an output com-
pare match may cause the interrupt flag (OCxIF)
to become set prior to the Change-of-State
(COS) of the OCx pin. This has been observed
when all of the following are true:
the
module
is
in
One-Shot
mode
(OCM<2:0> = 001, 010 or 100);
one of the timer modules is being used as
the time base; and
a timer prescaler other than 1:1 is selected.
If the module is re-initialized by clearing
OCM<2:0> after the One-Shot compare, the
OCx pin may not be driven as expected.
Work around
After OCxIF is set, allow an interval (in CPU
cycles) of at least twice the prescaler factor to
elapse before clearing OCM<2:0>. For example,
for a prescaler value of 1:8, allow 16 CPU cycles
to elapse after the interrupt.
Affected Silicon Revisions
32. Module: UART
When using UTXISEL<1:0> = 01 (interrupt when
last character is shifted out of the Transmit Shift
Register), and the final character is being shifted
out through the Transmit Shift Register, the TX
interrupt may occur before the final bit is shifted
out.
Work around
If it is critical that the interrupt processing occurs
only when all transmit operations are complete,
after which, the following work around can be
implemented:
Hold off the interrupt routine processing by adding
a loop at the beginning of the routine that polls the
Transmit Shift Register empty bit, as shown in
Affected Silicon Revisions
EXAMPLE 2:
DELAYING THE ISR BY POLLING THE TRMT BIT
A3
A5
A6
XX
X
A3
A5
A6
XX
X
// in UART2 initialization code
...
U2STAbits.UTXISEL0
= 1;
// Set to generate TX interrupt when all
U2STAbits.UTXISEL1
= 0;
// transmit operations are complete.
...
U2TXInterrupt(void)
{
while(U2STAbits.TRMT==0);
// wait for the transmit buffer to be empty
...
// process interrupt
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