參數(shù)資料
型號(hào)： PIC24FJ64GA004T-I/PT
廠商： Microchip Technology
文件頁數(shù)： 32/52頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 64KB 44TQFP
產(chǎn)品培訓(xùn)模塊： Graphics LCD System and PIC24 Interface
Asynchronous Stimulus
標(biāo)準(zhǔn)包裝： 1,200
系列： PIC® 24F
核心處理器： PIC
芯體尺寸： 16-位
速度： 32MHz
連通性： I²C，PMP，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 35
程序存儲(chǔ)器容量： 64KB（22K x 24）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 13x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 帶卷 (TR)
配用： DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28
AC164335-ND - MODULE SKT FOR 10X10 PM3 44TQFP
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
其它名稱： PIC24FJ64GA004T-I/PTTR
PIC24FJXXXGA0XX
DS39768D-page 38
2008 Microchip Technology Inc.
5.2.8
PROGC COMMAND
The PROGC command instructs the programming
executive to program a single Device ID register
located at the specified memory address.
After the specified data word has been programmed to
code memory, the programming executive verifies the
programmed data against the data in the command.
Expected Response (2 words):
1400h
0002h
5.2.9
PROGP COMMAND
The PROGP command instructs the programming
executive to program one row of code memory, includ-
ing Configuration Words (64 instruction words), to the
specified memory address. Programming begins with
the row address specified in the command. The
destination address should be a multiple of 80h.
The data to program to memory, located in command
words, D_1 through D_96, must be arranged using the
packed instruction word format shown in Figure 5-5.
After all data has been programmed to code memory,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
1500h
0002h
15
12 11
8 7
0
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
Field
Description
Opcode
4h
Length
4h
Reserved
0h
Addr_MSB
MSB of 24-bit destination address
Addr_LS
Least Significant 16 bits of 24-bit
destination address
Data
8-bit data word
15
12 11
8 7
0
Opcode
Length
Reserved
Addr_MSB
Addr_LS
D_1
D_2
...
D_96
Field
Description
Opcode
5h
Length
63h
Reserved
0h
Addr_MSB
MSB of 24-bit destination address
Addr_LS
Least Significant 16 bits of 24-bit
destination address
D_1
16-bit data word 1
D_2
16-bit data word 2
...
16-bit data word 3 through 95
D_96
16-bit data word 96
Note:
Refer to Table 2-3 for code memory size
information.
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