參數(shù)資料
型號: PIC24HJ128GP202-I/SP
廠商: Microchip Technology
文件頁數(shù): 40/84頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 128K 28DIP
標(biāo)準(zhǔn)包裝: 15
系列: PIC® 24H
核心處理器: PIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: I²C,IrDA,LIN,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 128KB(43K x 24)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁面: 649 (CN2011-ZH PDF)
配用: AC164337-ND - MODULE SOCKET FOR PM3 40DIP
2010 Microchip Technology Inc.
DS70152H-page 45
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
5.8
Reading Code Memory
Reading from code memory is performed by executing
a series of TBLRD instructions and clocking out the data
using the REGOUT command.
Table 5-8 shows the ICSP programming details for
reading code memory. In Step 1, the Reset vector is
exited. In Step 2, the 24-bit starting source address for
reading is loaded into the TBLPAG register and W6
register. The upper byte of the starting source address
is stored in TBLPAG and the lower 16 bits of the source
address are stored in W6.
To minimize the reading time, the packed instruction
word format that was utilized for writing is also used for
reading (see Figure 5-7). In Step 3, the write pointer,
W7, is initialized. In Step 4, two instruction words are
read from code memory and clocked out of the device,
through the VISI register, using the REGOUT command.
Step 4 is repeated until the desired amount of code
memory is read.
TABLE 5-8:
SERIAL INSTRUCTION EXECUTION FOR READING CODE MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit the Reset vector.
0000
040200
000000
GOTO
0x200
GOTO
0x200
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
200xx0
880190
2xxxx6
MOV
#<SourceAddress23:16>, W0
MOV
W0, TBLPAG
MOV
#<SourceAddress15:0>, W6
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
EB0380
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA1BB6
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA0BB6
000000
CLR
W7
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7++]
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7]
NOP
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