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| 型號： | PIC24HJ128GP206A-I/PT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 128KB 64-TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | PIC® 24H |
| 核心處理器： | PIC |
| 芯體尺寸： | 16-位 |
| 速度： | 40 MIP |
| 連通性： | I²C，IrDA，LIN，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 53 |
| 程序存儲器容量： | 128KB（43K x 24） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 18x10b/12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 64-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 649 (CN2011-ZH PDF) |
| 配用： | 876-1004-ND - PIC24 BREAKOUT BOARD |
2008 Microchip Technology Inc.
DS80280G-page 13
PIC24HJXXXGPX06/X08/X10
33. Module: DMA
When a DMA channel is enabled in Single-Shot
mode while the device is in Idle mode, and the
corresponding peripheral is active and configured
to operate during Idle mode, the DMA channel
may not become disabled immediately upon
transferring the required amount of data.
As a result, the number of bytes or words of data
transferred may exceed the DMA transfer count
specified in the DMAxCNT register.
For example, if DMA transfers are active for both
SPI byte transmissions and receptions, and only
the receive DMA channel interrupt is enabled for
waking up the device from Idle mode, an extra byte
will be transmitted by the time the device wakes up
from Idle mode.
Work around
None.
34. Module: Doze Mode and Traps
A DMA error trap may not be generated when the
device is in Doze mode.
Work around
None.
35. Module: Output Compare
When the Output Compare module is operated in
the Dual Compare Match mode, a timer compare
match with the value in the OCxR register sets the
OCx output producing a rising edge on the OCx
pin. Then, when a timer compare match with the
value in the OCxRS register occurs, the OCx
output is reset producing a falling edge on the OCx
pin.
The above statement applies to all conditions
except when the difference between OCxR and
OCxRS is 1. In this case, the Output Compare
module may miss the reset compare event, and
cause the OCx pin to remain continuously high.
This condition will remain until the difference
between values in the OCxR and OCxRS registers
is made greater than 1.
Work around
Ensure in software that the difference between
values
in
OCxR
and
OCxRS
registers
is
maintained greater than 1.
36. Module: UART
When the UART is in 4x mode (BRGH = 1) and
using two Stop bits (STSEL = 1), it may sample the
first Stop bit instead of the second one.
This issue does not affect the other UART
configurations.
Work around
Use the 16x baud rate option (BRGH = 0) and
adjust the baud rate accordingly.
37. Module: UART
When an auto-baud is detected, the receive
interrupt may occur twice. The first interrupt occurs
at the beginning of the Start bit and the second
after reception of the Sync field character.
Work around
If an extra interrupt is detected, ignore the
additional interrupt.
38. Module: DMA
When the DMA channel is configured for NULL
Data
Peripheral
Write
mode
(DMAxCON<11> = 1), it does not execute a null
(all zeros) write to the peripheral address.
Work around
Use two DMA channels to receive data from the
peripheral
module.
One
channel
must
be
configured to transfer data from the peripheral to
DMA RAM, while another channel must be
configured to transfer dummy data from the DMA
RAM to the peripheral. Both channels must be
setup for the same DMA request.
39. Module: DMA
A low priority DMA channel request can be
pre-empted by a higher priority DMA channel
request. For example, if DMA Channel 0 has a
higher priority than DMA Channel 1. A request
to DMA channel 1 will be pending while DMA
Channel 0 is processing its request. If DMA
Channel 1 receives another request while it is in
a pending request state, the DMA module does
not generate a DMA error trap event.
Work around
None. Using higher priority DMA channels for
servicing sources of frequent requests significantly
reduces the possibility of the condition described
above
occurring,
but
does
not
completely
eliminate it.
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| PIC24HJ128GP206AT-I/MR | 功能描述:16位微控制器 - MCU 16 Bit MCU 64LD 40MIPS 128KB FLASH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| PIC24HJ128GP206AT-I/PT | 功能描述:16位微控制器 - MCU 16 Bit MCU 40MIPS 128KB FLASH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| PIC24HJ128GP206-E/PT | 功能描述:16位微控制器 - MCU 16B MCU 64LD 40MIPS 128KB FLASH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| PIC24HJ128GP206-I/PT | 功能描述:16位微控制器 - MCU 40MIPS 128KB RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| PIC24HJ128GP206T-I/PT | 功能描述:16位微控制器 - MCU 40MIPS 128KB RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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