參數(shù)資料
型號: PIC24HJ32GP304-I/ML
廠商: Microchip Technology
文件頁數(shù): 26/84頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 32K 44-QFN
標(biāo)準(zhǔn)包裝: 45
系列: PIC® 24H
核心處理器: PIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: I²C,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲器容量: 32KB(11K x 24)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 648 (CN2011-ZH PDF)
配用: 876-1004-ND - PIC24 BREAKOUT BOARD
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
DS70152H-page 32
2010 Microchip Technology Inc.
5.0
DEVICE PROGRAMMING – ICSP
ICSP mode is a special programming protocol that
allows you to read and write to dsPIC33F/PIC24H
device family memory. The ICSP mode is the most
direct method used to program the device; however,
note that Enhanced ICSP is faster. ICSP mode also
has the ability to read the contents of executive
memory to determine if the programming executive is
present. This capability is accomplished by applying
control codes and instructions serially to the device
using pins PGCx and PGDx.
In ICSP mode, the system clock is taken from the
PGCx pin, regardless of the device’s oscillator Config-
uration bits. All instructions are shifted serially into an
internal buffer, then loaded into the instruction register
and executed. No program fetching occurs from inter-
nal memory. Instructions are fed in 24 bits at a time.
PGDx is used to shift data in, and PGCx is used as both
the serial shift clock and the CPU execution clock.
5.1
Overview of the Programming
Process
Figure 5-1 illustrates the high-level overview of the
programming process. After entering ICSP mode, the
first action is to Bulk Erase the device. Next, the code
memory is programmed, followed by the device
Configuration registers. Code memory (including the
Configuration registers) is then verified to ensure that
programming was successful. Then, program the
code-protect Configuration bits, if required.
FIGURE 5-1:
HIGH-LEVEL ICSP
PROGRAMMING FLOW
Note:
Any development tool that modifies the con-
figuration memory on dsPIC33FJ06GS101/
102/202,
dsPIC33FJ16GS402/404/502/
504, dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 devices
must take care to preserve the data con-
tained in the last six words of program mem-
for
more
information.
Note:
During ICSP operation, the operating
frequency of PGCx must not exceed
5MHz.
Start
Perform Bulk
Erase
Program Memory
Verify Program
End
Enter ICSP
Program Configuration Bits
Verify Configuration Bits
Exit ICSP
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