參數(shù)資料
型號(hào): PIC24HJ64GP504-I/ML
廠商: Microchip Technology
文件頁(yè)數(shù): 59/84頁(yè)
文件大小: 0K
描述: IC PIC MCU FLASH 64K 44-QFN
標(biāo)準(zhǔn)包裝: 45
系列: PIC® 24H
核心處理器: PIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: CAN,I²C,IrDA,LIN,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲(chǔ)器容量: 64KB(22K x 24)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤(pán)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 648 (CN2011-ZH PDF)
配用: 876-1004-ND - PIC24 BREAKOUT BOARD
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
DS70152H-page 62
2010 Microchip Technology Inc.
APPENDIX B: DEVICE ID REGISTER
SILICON ERRATA
ADDENDUM
This silicon errata issue was previously published in the
following documents, which are available from the
Microchip web site:
dsPIC33FJXXXGPX06/X08/X10 Rev. A2 Silicon
Errata (DS80306)
dsPIC33FJXXXMCX06/X08/X10 Rev. A2 Silicon
Errata (DS80307)
PIC24HJXXXGPX06/X08/X10 Rev. A2 Silicon
Errata (DS80280)
This issue is included in this document to further assist
customers.
1. Module: Device ID Register
On a few devices, the content of the Device ID
register can change from the factory programmed
default value immediately after RTSP or ICSP
Flash programming.
As a result, development tools will not recognize
these devices and will generate an error message
indicating that the device ID and the device part
number do not match. Additionally, some
peripherals will be reconfigured and will not
function as described in the device data sheet.
Refer to Section 5. “Flash Programming”
(DS70191), of the “dsPIC33F Family Reference
Manual” for an explanation of RTSP and ICSP
Flash programming.
Work around
All RTSP and ICSP Flash programming routines
must be modified as follows:
1. No word programming is allowed. Any word
programming must be replaced with row
programming.
2. During row programming, load write latches as
described in 5.4.2.3 “Loading Write Latches”
of
Section
5.
“Flash
Programming”
(DS70191).
3. After latches are loaded, reload any latch
location (in a given row) that has 5 LSB set to
0x18, with the original data. For example,
reload one of the following latch locations with
the desired data:
0xXXXX18, 0xXXXX38, 0xXXXX58,
0xXXXX78, 0xXXXX98, 0xXXXXB8,
0xXXXXD8, 0xXXXXF8
4. Start
row
programming
by
setting
NVMOP<3:0> = ‘0001’ (Memory row program
operation) in the NVMCON register.
5. After row programming is complete, verify the
contents of Flash memory.
6. If Flash verification errors are found, repeat
steps 2 through 5. If Flash verification errors
are found after a second iteration, report this
problem to Microchip.
Steps 1 through 5 in the work around are
implemented in MPLAB IDE version 7.61 for the
MPLAB ICD 2, MPLAB REAL ICE in-circuit
emulator and MPLAB PM3 tools.
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