參數(shù)資料
型號: PIC32MX420F032HT-40I/PT
廠商: Microchip Technology
文件頁數(shù): 8/44頁
文件大小: 0K
描述: IC MCU 32BIT 32KB 64TQFP
標準包裝: 1,200
系列: PIC® 32MX
核心處理器: MIPS32? M4K?
芯體尺寸: 32-位
速度: 40MHz
連通性: I²C,IrDA,LIN,PMP,SPI,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測/復位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 帶卷 (TR)
配用: AC164327-ND - MODULE SKT FOR 64TQFP
Getting Started with PIC32
DS61146B-page 12
2008 Microchip Technology Inc.
Processor core:
MIPS M4K with 5-stage pipeline
MIPS32-compatible Release 2 Instruction Set
MIPS16e Code Compression to improve code density by up to 40%
GPR shadow registers to minimize latency for interrupt handlers
Bit field manipulation instructions
High-performance Multiply/Divide Unit:
- Maximum issue rate of one 32x16 multiply per clock
- Maximum issue rate of one 32x32 multiply every other clock
Static implementation: minimum operating frequency 0 MHz
2.3 to 3.6V operation with full speed over entire range
Low-power modes including RUN, IDLE, and SLEEP
Memory:
Unified 4GB virtual memory space
Fixed Memory Mapping Translation (FMT) mechanism
Flexible partitioning into kernel and user accessible memory segments for
increased application stability
Pre Fetch Cache:
16 lines, each 128-bit wide, instruction Prefetch buffer
Ability to load and lock lines – useful to create SW breakpoints in Flash and
minimize interrupt latency
Interrupt Controller:
Fully programmable interrupt controller with Single or Multi vector mode, support-
ing up to 95 IRQs.
Multiple priorities and subpriorities for each vector
Highest priority interrupt has dedicated register set for reduced interrupt latency
DMA Controller:
Up to 4 independent channels
Memory-to-Memory, Memory-to-Peripheral, and Peripheral-to-Memory transfers
Programmable trigger from any IRQ
Chainable channels, stop on match detection, Auto-Enable mode
Data transfers can occur while the core is in IDLE mode
Integrated programmable CRC engine: calculates on the fly while the data is
transferred.
Enhanced Parallel Master Port:
8- and 16-bit data interface
Up to 16-bit address lines, expandable using GPIO lines
2 Chip Select lines
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